1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/mux/reg-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic register bitfield-based multiplexer controller bindings
10 - Peter Rosin <peda@axentia.se>
13 Define register bitfields to be used to control multiplexers. The parent
14 device tree node must be a device node to provide register r/w access.
19 - reg-mux # parent device of mux controller is not syscon device
20 - mmio-mux # parent device of mux controller is syscon device
28 $ref: /schemas/types.yaml#/definitions/uint32-matrix
31 - description: register offset
32 - description: pre-shifted bitfield mask
33 description: Each entry pair describes a single mux control.
40 - '#mux-control-cells'
42 additionalProperties: false
46 /* The parent device of mux controller is not a syscon device. */
48 #include <dt-bindings/mux/mux.h>
51 compatible = "reg-mux";
52 #mux-control-cells = <1>;
54 <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
55 <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
59 compatible = "mdio-mux-multiplexer";
60 mux-controls = <&mux1 0>;
61 mdio-parent-bus = <&emdio1>;
79 compatible = "mdio-mux-multiplexer";
80 mux-controls = <&mux1 1>;
81 mdio-parent-bus = <&emdio2>;
99 /* The parent device of mux controller is syscon device. */
101 #include <dt-bindings/mux/mux.h>
103 reg = <0x1000 0x100>;
105 mux2: mux-controller {
106 compatible = "mmio-mux";
107 #mux-control-cells = <1>;
110 <0x3 0x30>, /* 0: reg 0x3, bits 5:4 */
111 <0x3 0x40>; /* 1: reg 0x3, bit 6 */
112 idle-states = <MUX_IDLE_AS_IS>, <0>;
117 compatible = "video-mux";
118 mux-controls = <&mux2 0>;
119 #address-cells = <1>;
123 #address-cells = <1>;