Documentation/devicetree/bindings/mtd/qcom,nandc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm NAND controller
   8
   9 maintainers:
  10   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  11
  12 properties:
  13   compatible:
  14     enum:
  15       - qcom,ipq806x-nand
  16       - qcom,ipq4019-nand
  17       - qcom,ipq6018-nand
  18       - qcom,ipq8074-nand
  19       - qcom,sdx55-nand
  20
  21   reg:
  22     maxItems: 1
  23
  24   clocks:
  25     items:
  26       - description: Core Clock
  27       - description: Always ON Clock
  28
  29   clock-names:
  30     items:
  31       - const: core
  32       - const: aon
  33
  34   "#address-cells": true
  35   "#size-cells": true
  36
  37 patternProperties:
  38   "^nand@[a-f0-9]$":
  39     type: object
  40     properties:
  41       nand-bus-width:
  42         const: 8
  43
  44       nand-ecc-strength:
  45         enum: [1, 4, 8]
  46
  47       nand-ecc-step-size:
  48         enum:
  49           - 512
  50
  51 allOf:
  52   - $ref: "nand-controller.yaml#"
  53
  54   - if:
  55       properties:
  56         compatible:
  57           contains:
  58             const: qcom,ipq806x-nand
  59     then:
  60       properties:
  61         dmas:
  62           items:
  63             - description: rxtx DMA channel
  64
  65         dma-names:
  66           items:
  67             - const: rxtx
  68
  69         qcom,cmd-crci:
  70           $ref: /schemas/types.yaml#/definitions/uint32
  71           description:
  72             Must contain the ADM command type CRCI block instance number
  73             specified for the NAND controller on the given platform
  74
  75         qcom,data-crci:
  76           $ref: /schemas/types.yaml#/definitions/uint32
  77           description:
  78             Must contain the ADM data type CRCI block instance number
  79             specified for the NAND controller on the given platform
  80
  81   - if:
  82       properties:
  83         compatible:
  84           contains:
  85             enum:
  86               - qcom,ipq4019-nand
  87               - qcom,ipq6018-nand
  88               - qcom,ipq8074-nand
  89               - qcom,sdx55-nand
  90
  91     then:
  92       properties:
  93         dmas:
  94           items:
  95             - description: tx DMA channel
  96             - description: rx DMA channel
  97             - description: cmd DMA channel
  98
  99         dma-names:
 100           items:
 101             - const: tx
 102             - const: rx
 103             - const: cmd
 104
 105   - if:
 106       properties:
 107         compatible:
 108           contains:
 109             enum:
 110               - qcom,ipq806x-nand
 111
 112     then:
 113       properties:
 114         qcom,boot-partitions:
 115           $ref: /schemas/types.yaml#/definitions/uint32-matrix
 116           items:
 117             items:
 118               - description: offset
 119               - description: size
 120           description:
 121             Boot partition use a different layout where the 4 bytes of spare
 122             data are not protected by ECC. Use this to declare these special
 123             partitions by defining first the offset and then the size.
 124
 125             It's in the form of <offset1 size1 offset2 size2 offset3 ...>
 126             and should be declared in ascending order.
 127
 128             Refer to the ipq8064 example on how to use this special binding.
 129
 130 required:
 131   - compatible
 132   - reg
 133   - clocks
 134   - clock-names
 135
 136 unevaluatedProperties: false
 137
 138 examples:
 139   - |
 140     #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
 141     nand-controller@1ac00000 {
 142       compatible = "qcom,ipq806x-nand";
 143       reg = <0x1ac00000 0x800>;
 144
 145       clocks = <&gcc EBI2_CLK>,
 146                <&gcc EBI2_AON_CLK>;
 147       clock-names = "core", "aon";
 148
 149       dmas = <&adm_dma 3>;
 150       dma-names = "rxtx";
 151       qcom,cmd-crci = <15>;
 152       qcom,data-crci = <3>;
 153
 154       #address-cells = <1>;
 155       #size-cells = <0>;
 156
 157       nand@0 {
 158         reg = <0>;
 159
 160         nand-ecc-strength = <4>;
 161         nand-bus-width = <8>;
 162
 163         qcom,boot-partitions = <0x0 0x58a0000>;
 164
 165         partitions {
 166           compatible = "fixed-partitions";
 167           #address-cells = <1>;
 168           #size-cells = <1>;
 169
 170           partition@0 {
 171             label = "boot-nand";
 172             reg = <0 0x58a0000>;
 173           };
 174
 175           partition@58a0000 {
 176             label = "fs-nand";
 177             reg = <0x58a0000 0x4000000>;
 178           };
 179         };
 180       };
 181     };
 182
 183     #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
 184     nand-controller@79b0000 {
 185       compatible = "qcom,ipq4019-nand";
 186       reg = <0x79b0000 0x1000>;
 187
 188       clocks = <&gcc GCC_QPIC_CLK>,
 189                <&gcc GCC_QPIC_AHB_CLK>;
 190       clock-names = "core", "aon";
 191
 192       dmas = <&qpicbam 0>,
 193              <&qpicbam 1>,
 194              <&qpicbam 2>;
 195       dma-names = "tx", "rx", "cmd";
 196
 197       #address-cells = <1>;
 198       #size-cells = <0>;
 199
 200       nand@0 {
 201         reg = <0>;
 202         nand-ecc-strength = <4>;
 203         nand-bus-width = <8>;
 204
 205         partitions {
 206           compatible = "fixed-partitions";
 207           #address-cells = <1>;
 208           #size-cells = <1>;
 209
 210           partition@0 {
 211             label = "boot-nand";
 212             reg = <0 0x58a0000>;
 213           };
 214
 215           partition@58a0000 {
 216             label = "fs-nand";
 217             reg = <0x58a0000 0x4000000>;
 218           };
 219         };
 220       };
 221     };
 222
 223 ...