Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: PL353 NAND Controller
   8
   9 allOf:
  10   - $ref: nand-controller.yaml
  11
  12 maintainers:
  13   - Miquel Raynal <miquel.raynal@bootlin.com>
  14
  15 properties:
  16   compatible:
  17     items:
  18       - const: arm,pl353-nand-r2p1
  19
  20   reg:
  21     items:
  22       - items:
  23           - description: CS with regard to the parent ranges property
  24           - description: Offset of the memory region requested by the device
  25           - description: Length of the memory region requested by the device
  26
  27 required:
  28   - compatible
  29   - reg
  30
  31 unevaluatedProperties: false
  32
  33 examples:
  34   - |
  35     smcc: memory-controller@e000e000 {
  36         compatible = "arm,pl353-smc-r2p1", "arm,primecell";
  37         reg = <0xe000e000 0x0001000>;
  38         clock-names = "memclk", "apb_pclk";
  39         clocks = <&clkc 11>, <&clkc 44>;
  40         ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
  41                   0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
  42                   0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
  43         #address-cells = <2>;
  44         #size-cells = <1>;
  45
  46         nfc0: nand-controller@0,0 {
  47             compatible = "arm,pl353-nand-r2p1";
  48             reg = <0 0 0x1000000>;
  49             #address-cells = <1>;
  50             #size-cells = <0>;
  51         };
  52     };