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[releases.git] / Documentation / devicetree / bindings / mtd / amlogic,meson-nand.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
8
9 allOf:
10   - $ref: nand-controller.yaml
11
12 maintainers:
13   - liang.yang@amlogic.com
14
15 properties:
16   compatible:
17     enum:
18       - amlogic,meson-gxl-nfc
19       - amlogic,meson-axg-nfc
20
21   reg:
22     maxItems: 2
23
24   reg-names:
25     items:
26       - const: nfc
27       - const: emmc
28
29   interrupts:
30     maxItems: 1
31
32   clocks:
33     minItems: 2
34
35   clock-names:
36     items:
37       - const: core
38       - const: device
39
40 patternProperties:
41   "^nand@[0-7]$":
42     type: object
43     $ref: raw-nand-chip.yaml
44     properties:
45       reg:
46         minimum: 0
47         maximum: 1
48
49       nand-ecc-mode:
50         const: hw
51
52       nand-ecc-step-size:
53         enum: [512, 1024]
54
55       nand-ecc-strength:
56         enum: [8, 16, 24, 30, 40, 50, 60]
57         description: |
58           The ECC configurations that can be supported are as follows.
59             meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
60             meson-axg-nfc 8
61
62       nand-rb:
63         maxItems: 1
64         items:
65           maximum: 0
66
67     unevaluatedProperties: false
68
69     dependencies:
70       nand-ecc-strength: [nand-ecc-step-size]
71       nand-ecc-step-size: [nand-ecc-strength]
72
73
74 required:
75   - compatible
76   - reg
77   - interrupts
78   - clocks
79   - clock-names
80
81 unevaluatedProperties: false
82
83 examples:
84   - |
85     #include <dt-bindings/clock/axg-clkc.h>
86     #include <dt-bindings/interrupt-controller/arm-gic.h>
87     nand-controller@ffe07800 {
88       compatible = "amlogic,meson-axg-nfc";
89       reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
90       reg-names = "nfc", "emmc";
91       interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
92       clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
93       clock-names = "core", "device";
94
95       pinctrl-0 = <&nand_pins>;
96       pinctrl-names = "default";
97
98       #address-cells = <1>;
99       #size-cells = <0>;
100
101       nand@0 {
102         reg = <0>;
103         nand-rb = <0>;
104       };
105     };
106
107 ...