Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Allwinner A10 NAND Controller
   8
   9 allOf:
  10   - $ref: nand-controller.yaml
  11
  12 maintainers:
  13   - Chen-Yu Tsai <wens@csie.org>
  14   - Maxime Ripard <mripard@kernel.org>
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - allwinner,sun4i-a10-nand
  20       - allwinner,sun8i-a23-nand-controller
  21   reg:
  22     maxItems: 1
  23
  24   interrupts:
  25     maxItems: 1
  26
  27   clocks:
  28     items:
  29       - description: Bus Clock
  30       - description: Module Clock
  31
  32   clock-names:
  33     items:
  34       - const: ahb
  35       - const: mod
  36
  37   resets:
  38     maxItems: 1
  39
  40   reset-names:
  41     const: ahb
  42
  43   dmas:
  44     maxItems: 1
  45
  46   dma-names:
  47     const: rxtx
  48
  49 patternProperties:
  50   "^nand@[a-f0-9]$":
  51     type: object
  52     $ref: raw-nand-chip.yaml
  53     properties:
  54       reg:
  55         minimum: 0
  56         maximum: 7
  57
  58       nand-ecc-algo:
  59         const: bch
  60
  61       nand-ecc-step-size:
  62         enum: [ 512, 1024 ]
  63
  64       nand-ecc-strength:
  65         maximum: 80
  66
  67       allwinner,rb:
  68         description:
  69           Contains the native Ready/Busy IDs.
  70         $ref: /schemas/types.yaml#/definitions/uint32-array
  71         minItems: 1
  72         maxItems: 2
  73         items:
  74           minimum: 0
  75           maximum: 1
  76
  77     unevaluatedProperties: false
  78
  79 required:
  80   - compatible
  81   - reg
  82   - interrupts
  83   - clocks
  84   - clock-names
  85
  86 unevaluatedProperties: false
  87
  88 examples:
  89   - |
  90     #include <dt-bindings/interrupt-controller/arm-gic.h>
  91     #include <dt-bindings/clock/sun6i-rtc.h>
  92     #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
  93     #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
  94
  95     nand-controller@1c03000 {
  96         compatible = "allwinner,sun8i-a23-nand-controller";
  97         reg = <0x01c03000 0x1000>;
  98         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
  99         clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
 100         clock-names = "ahb", "mod";
 101         resets = <&ccu RST_BUS_NAND>;
 102         reset-names = "ahb";
 103         dmas = <&dma 5>;
 104         dma-names = "rxtx";
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
 107         #address-cells = <1>;
 108         #size-cells = <0>;
 109     };
 110
 111 ...