Documentation/devicetree/bindings/mmc/tmio_mmc.txt

   1 * Toshiba Mobile IO SD/MMC controller
   2
   3 The tmio-mmc driver doesn't probe its devices actively, instead its binding to
   4 devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
   5 driver. Those drivers supply the tmio-mmc driver with platform data, that either
   6 describe hardware capabilities, known to them, or are obtained by them from
   7 their own platform data or from their DT information. In the latter case all
   8 compulsory and any optional properties, common to all SD/MMC drivers, as
   9 described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
  10 optional bindings can be used.
  11
  12 Required properties:
  13 - compatible: should contain one or more of the following:
  14                 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
  15                 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
  16                 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
  17                 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
  18                 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
  19                 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
  20                 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
  21                 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
  22                 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
  23                 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
  24                 "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
  25                 "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
  26                 "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
  27                 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
  28                 "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC
  29                 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
  30                 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
  31                 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
  32                 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
  33                 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
  34                 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
  35                 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 or RZ/G1
  36                                            SDHI controller
  37                 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 SDHI controller
  38
  39
  40                 When compatible with the generic version, nodes must list
  41                 the SoC-specific version corresponding to the platform
  42                 first followed by the generic version.
  43
  44 - clocks: Most controllers only have 1 clock source per channel. However, on
  45           some variations of this controller, the internal card detection
  46           logic that exists in this controller is sectioned off to be run by a
  47           separate second clock source to allow the main core clock to be turned
  48           off to save power.
  49           If 2 clocks are specified by the hardware, you must name them as
  50           "core" and "cd". If the controller only has 1 clock, naming is not
  51           required.
  52           Devices which have more than 1 clock are listed below:
  53           2: R7S72100
  54
  55 Optional properties:
  56 - pinctrl-names: should be "default", "state_uhs"
  57 - pinctrl-0: should contain default/high speed pin ctrl
  58 - pinctrl-1: should contain uhs mode pin ctrl
  59
  60 Example: R8A7790 (R-Car H2) SDHI controller nodes
  61
  62         sdhi0: sd@ee100000 {
  63                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  64                 reg = <0 0xee100000 0 0x328>;
  65                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
  66                 clocks = <&cpg CPG_MOD 314>;
  67                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
  68                        <&dmac1 0xcd>, <&dmac1 0xce>;
  69                 dma-names = "tx", "rx", "tx", "rx";
  70                 max-frequency = <195000000>;
  71                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  72                 resets = <&cpg 314>;
  73         };
  74
  75         sdhi1: sd@ee120000 {
  76                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  77                 reg = <0 0xee120000 0 0x328>;
  78                 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
  79                 clocks = <&cpg CPG_MOD 313>;
  80                 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
  81                        <&dmac1 0xc9>, <&dmac1 0xca>;
  82                 dma-names = "tx", "rx", "tx", "rx";
  83                 max-frequency = <195000000>;
  84                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  85                 resets = <&cpg 313>;
  86         };
  87
  88         sdhi2: sd@ee140000 {
  89                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
  90                 reg = <0 0xee140000 0 0x100>;
  91                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
  92                 clocks = <&cpg CPG_MOD 312>;
  93                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
  94                        <&dmac1 0xc1>, <&dmac1 0xc2>;
  95                 dma-names = "tx", "rx", "tx", "rx";
  96                 max-frequency = <97500000>;
  97                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
  98                 resets = <&cpg 312>;
  99         };
 100
 101         sdhi3: sd@ee160000 {
 102                 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 103                 reg = <0 0xee160000 0 0x100>;
 104                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 105                 clocks = <&cpg CPG_MOD 311>;
 106                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 107                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 108                 dma-names = "tx", "rx", "tx", "rx";
 109                 max-frequency = <97500000>;
 110                 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 111                 resets = <&cpg 311>;
 112         };