Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Renesas SDHI SD/MMC controller
   8
   9 maintainers:
  10   - Wolfram Sang <wsa+renesas@sang-engineering.com>
  11
  12 properties:
  13   compatible:
  14     oneOf:
  15       - items:
  16           - const: renesas,sdhi-sh73a0  # R-Mobile APE6
  17       - items:
  18           - const: renesas,sdhi-r7s72100 # RZ/A1H
  19       - items:
  20           - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
  21       - items:
  22           - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
  23       - items:
  24           - const: renesas,sdhi-r8a7740 # R-Mobile A1
  25       - items:
  26           - enum:
  27               - renesas,sdhi-r8a7778 # R-Car M1
  28               - renesas,sdhi-r8a7779 # R-Car H1
  29           - const: renesas,rcar-gen1-sdhi # R-Car Gen1
  30       - items:
  31           - enum:
  32               - renesas,sdhi-r8a7742  # RZ/G1H
  33               - renesas,sdhi-r8a7743  # RZ/G1M
  34               - renesas,sdhi-r8a7744  # RZ/G1N
  35               - renesas,sdhi-r8a7745  # RZ/G1E
  36               - renesas,sdhi-r8a77470 # RZ/G1C
  37               - renesas,sdhi-r8a7790  # R-Car H2
  38               - renesas,sdhi-r8a7791  # R-Car M2-W
  39               - renesas,sdhi-r8a7792  # R-Car V2H
  40               - renesas,sdhi-r8a7793  # R-Car M2-N
  41               - renesas,sdhi-r8a7794  # R-Car E2
  42           - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
  43       - items:
  44           - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
  45       - items:
  46           - enum:
  47               - renesas,sdhi-r8a774a1  # RZ/G2M
  48               - renesas,sdhi-r8a774b1  # RZ/G2N
  49               - renesas,sdhi-r8a774c0  # RZ/G2E
  50               - renesas,sdhi-r8a774e1  # RZ/G2H
  51               - renesas,sdhi-r8a7795   # R-Car H3
  52               - renesas,sdhi-r8a7796   # R-Car M3-W
  53               - renesas,sdhi-r8a77961  # R-Car M3-W+
  54               - renesas,sdhi-r8a77965  # R-Car M3-N
  55               - renesas,sdhi-r8a77970  # R-Car V3M
  56               - renesas,sdhi-r8a77980  # R-Car V3H
  57               - renesas,sdhi-r8a77990  # R-Car E3
  58               - renesas,sdhi-r8a77995  # R-Car D3
  59               - renesas,sdhi-r9a07g043 # RZ/G2UL
  60               - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
  61               - renesas,sdhi-r9a07g054 # RZ/V2L
  62           - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
  63       - items:
  64           - enum:
  65               - renesas,sdhi-r8a779a0  # R-Car V3U
  66               - renesas,sdhi-r8a779f0  # R-Car S4-8
  67           - const: renesas,rcar-gen4-sdhi # R-Car Gen4
  68
  69   reg:
  70     maxItems: 1
  71
  72   interrupts:
  73     minItems: 1
  74     maxItems: 3
  75
  76   clocks: true
  77
  78   clock-names: true
  79
  80   dmas:
  81     minItems: 4
  82     maxItems: 4
  83
  84   dma-names:
  85     minItems: 4
  86     maxItems: 4
  87     items:
  88       enum:
  89         - tx
  90         - rx
  91
  92   iommus:
  93     maxItems: 1
  94
  95   power-domains:
  96     maxItems: 1
  97
  98   resets:
  99     maxItems: 1
 100
 101   pinctrl-0:
 102     minItems: 1
 103     maxItems: 2
 104
 105   pinctrl-1:
 106     maxItems: 1
 107
 108   pinctrl-names: true
 109
 110   max-frequency: true
 111
 112 allOf:
 113   - $ref: "mmc-controller.yaml"
 114
 115   - if:
 116       properties:
 117         compatible:
 118           contains:
 119             enum:
 120               - renesas,sdhi-r9a07g043
 121               - renesas,sdhi-r9a07g044
 122               - renesas,sdhi-r9a07g054
 123     then:
 124       properties:
 125         clocks:
 126           items:
 127             - description: IMCLK, SDHI channel main clock1.
 128             - description: CLK_HS, SDHI channel High speed clock which operates
 129                            4 times that of SDHI channel main clock1.
 130             - description: IMCLK2, SDHI channel main clock2. When this clock is
 131                            turned off, external SD card detection cannot be
 132                            detected.
 133             - description: ACLK, SDHI channel bus clock.
 134         clock-names:
 135           items:
 136             - const: core
 137             - const: clkh
 138             - const: cd
 139             - const: aclk
 140       required:
 141         - clock-names
 142         - resets
 143     else:
 144       if:
 145         properties:
 146           compatible:
 147             contains:
 148               enum:
 149                 - renesas,rcar-gen2-sdhi
 150                 - renesas,rcar-gen3-sdhi
 151                 - renesas,rcar-gen4-sdhi
 152       then:
 153         properties:
 154           clocks:
 155             minItems: 1
 156             maxItems: 3
 157           clock-names:
 158             minItems: 1
 159             uniqueItems: true
 160             items:
 161               - const: core
 162               - enum: [ clkh, cd ]
 163               - const: cd
 164       else:
 165         properties:
 166           clocks:
 167             minItems: 1
 168             maxItems: 2
 169           clock-names:
 170             minItems: 1
 171             items:
 172               - const: core
 173               - const: cd
 174
 175   - if:
 176       properties:
 177         compatible:
 178           contains:
 179             const: renesas,sdhi-mmc-r8a77470
 180     then:
 181       properties:
 182         pinctrl-names:
 183           items:
 184             - const: state_uhs
 185     else:
 186       properties:
 187         pinctrl-names:
 188           minItems: 1
 189           items:
 190             - const: default
 191             - const: state_uhs
 192
 193   - if:
 194       properties:
 195         compatible:
 196           contains:
 197             enum:
 198               - renesas,sdhi-r7s72100
 199               - renesas,sdhi-r7s9210
 200     then:
 201       required:
 202         - clock-names
 203       description:
 204         The internal card detection logic that exists in these controllers is
 205         sectioned off to be run by a separate second clock source to allow
 206         the main core clock to be turned off to save power.
 207
 208 required:
 209   - compatible
 210   - reg
 211   - interrupts
 212   - clocks
 213   - power-domains
 214
 215 unevaluatedProperties: false
 216
 217 examples:
 218   - |
 219     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
 220     #include <dt-bindings/interrupt-controller/arm-gic.h>
 221     #include <dt-bindings/power/r8a7790-sysc.h>
 222
 223     sdhi0: mmc@ee100000 {
 224             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 225             reg = <0xee100000 0x328>;
 226             interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 227             clocks = <&cpg CPG_MOD 314>;
 228             dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
 229             dma-names = "tx", "rx", "tx", "rx";
 230             max-frequency = <195000000>;
 231             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 232             resets = <&cpg 314>;
 233     };
 234
 235     sdhi1: mmc@ee120000 {
 236              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 237              reg = <0xee120000 0x328>;
 238              interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
 239              clocks = <&cpg CPG_MOD 313>;
 240              dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
 241              dma-names = "tx", "rx", "tx", "rx";
 242              max-frequency = <195000000>;
 243              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 244              resets = <&cpg 313>;
 245     };
 246
 247     sdhi2: mmc@ee140000 {
 248              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 249              reg = <0xee140000 0x100>;
 250              interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 251              clocks = <&cpg CPG_MOD 312>;
 252              dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
 253              dma-names = "tx", "rx", "tx", "rx";
 254              max-frequency = <97500000>;
 255              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 256              resets = <&cpg 312>;
 257      };
 258
 259      sdhi3: mmc@ee160000 {
 260               compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
 261               reg = <0xee160000 0x100>;
 262               interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 263               clocks = <&cpg CPG_MOD 311>;
 264               dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
 265               dma-names = "tx", "rx", "tx", "rx";
 266               max-frequency = <97500000>;
 267               power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 268               resets = <&cpg 311>;
 269     };