1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "mmc-controller.yaml"
16 The Enhanced Secure Digital Host Controller on Freescale i.MX family
17 provides an interface for MMC, SD, and SDIO types of memory cards.
19 This file documents differences between the core properties described
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
43 - const: fsl,imx7d-usdhc
50 - const: fsl,imx8mm-usdhc
54 - const: fsl,imx8qxp-usdhc
63 - const: fsl,imx7d-usdhc
69 - const: fsl,imx8mm-usdhc
70 - const: fsl,imx7d-usdhc
75 - const: fsl,imx8qxp-usdhc
76 - const: fsl,imx7d-usdhc
87 boolean, if present, indicate to use controller internal write protection.
91 $ref: /schemas/types.yaml#/definitions/uint32
93 Specify the number of delay cells for override mode.
94 This is used to set the clock delay for DLL(Delay Line) on override mode
95 to select a proper data sampling window in case the clock quality is not good
96 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
97 chapter, DLL (Delay Line) section in RM for details.
101 $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
103 Specify the voltage range in case there are software transparent level
104 shifters on the outputs of the controller. Two cells are required, first
105 cell specifies minimum slot voltage (mV), second cell specifies maximum
109 - description: value for minimum slot voltage
110 - description: value for maximum slot voltage
113 fsl,tuning-start-tap:
114 $ref: /schemas/types.yaml#/definitions/uint32
116 Specify the start delay cell point when send first CMD19 in tuning procedure.
120 $ref: /schemas/types.yaml#/definitions/uint32
122 Specify the increasing delay cell steps in tuning procedure.
123 The uSDHC use one delay cell as default increasing step to do tuning process.
124 This property allows user to change the tuning step to more than one delay
125 cells which is useful for some special boards or cards when the default
126 tuning step can't find the proper delay window within limited tuning retries.
129 fsl,strobe-dll-delay-target:
130 $ref: /schemas/types.yaml#/definitions/uint32
132 Specify the strobe dll control slave delay target.
133 This delay target programming host controller loopback read clock, and this
134 property allows user to change the delay target for the strobe input read clock.
135 If not use this property, driver default set the delay target to value 7.
136 Only eMMC HS400 mode need to take care of this property.
142 Handle clocks for the sdhc controller.
158 - const: state_100mhz
159 - const: state_200mhz
171 unevaluatedProperties: false
176 compatible = "fsl,imx51-esdhc";
177 reg = <0x70004000 0x4000>;
183 compatible = "fsl,imx51-esdhc";
184 reg = <0x70008000 0x4000>;
186 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
187 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */