1 * Freescale Enhanced Secure Digital Host Controller (eSDHC)
3 The Enhanced Secure Digital Host Controller provides an interface
4 for MMC, SD, and SDIO types of memory cards.
6 This file documents differences between the core properties described
7 by mmc.txt and the properties used by the sdhci-esdhc driver.
10 - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
11 Possible compatibles for PowerPC:
18 Possible compatibles for ARM:
24 - clock-frequency : specifies eSDHC base clock frequency.
27 - sdhci,wp-inverted : specifies that eSDHC controller reports
28 inverted write-protect state; New devices should use the generic
29 "wp-inverted" property.
30 - sdhci,1-bit-only : specifies that a controller can only handle
31 1-bit data transfers. New devices should use the generic
32 "bus-width = <1>" property.
33 - sdhci,auto-cmd12: specifies that a controller can only handle auto
35 - voltage-ranges : two cells are required, first cell specifies minimum
36 slot voltage (mV), second cell specifies maximum slot voltage (mV).
37 Several ranges could be specified.
38 - little-endian : If the host controller is little-endian mode, specify
39 this property. The default endian mode is big-endian.
44 compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
45 reg = <0x2e000 0x1000>;
46 interrupts = <42 0x8>;
47 interrupt-parent = <&ipic>;
48 /* Filled in by U-Boot */
49 clock-frequency = <0>;
50 voltage-ranges = <3300 3300>;