1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 The ARM PrimeCells MMCI PL180 and PL181 provides an interface for
15 reading and writing to MultiMedia and SD cards alike. Over the years
16 vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO
17 host controllers with very similar characteristics.
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
23 # We need a select here so we don't match all nodes with 'arm,primecell'
38 - description: The first version of the block, simply called
39 PL180 and found in the ARM Integrator IM/PD1 logic module.
42 - const: arm,primecell
43 - description: The improved version of the block, found in the
44 ARM Versatile and later reference designs. Further revisions
45 exist but get detected at runtime by reading some magic numbers
46 in the PrimeCell ID registers.
49 - const: arm,primecell
50 - description: Wildcard entry that will let the operating system
51 inspect the PrimeCell ID registers to determine which hardware
52 variant of PL180 or PL181 this is.
55 - const: arm,primecell
56 - description: Entry for STMicroelectronics variant of PL18x.
57 This dedicated compatible is used by bootloaders.
59 - const: st,stm32-sdmmc2
61 - const: arm,primecell
64 description: One or two clocks, the "apb_pclk" and the "MCLK"
65 which is the core block clock. The names are not compulsory.
87 description: the MMIO memory window must be exactly 4KB (0x1000) and the
88 layout should provide the PrimeCell ID registers so that the device can
89 be discovered. On ST Micro variants, a second register window may be
90 defined if a delay block is present and used for tuning.
93 description: The first interrupt is the command interrupt and corresponds
94 to the event at the end of a command. The second interrupt is the
95 PIO (polled I/O) interrupt and occurs when the FIFO needs to be
96 emptied as part of a bulk read from the card. Some variants have these
97 two interrupts wired into the same line (logic OR) and in that case
98 only one interrupt may be provided.
103 $ref: /schemas/types.yaml#/definitions/flag
104 description: ST Micro-specific property, bus signal direction pins used for
108 $ref: /schemas/types.yaml#/definitions/flag
109 description: ST Micro-specific property, bus signal direction pins used for
113 $ref: /schemas/types.yaml#/definitions/flag
114 description: ST Micro-specific property, bus signal direction pins used for
118 $ref: /schemas/types.yaml#/definitions/flag
119 description: ST Micro-specific property, bus signal direction pins used for
123 $ref: /schemas/types.yaml#/definitions/flag
124 description: ST Micro-specific property, CMD signal direction used for
128 $ref: /schemas/types.yaml#/definitions/flag
129 description: ST Micro-specific property, feedback clock FBCLK signal pin
133 $ref: /schemas/types.yaml#/definitions/flag
134 description: ST Micro-specific property, signal direction polarity used for
135 pins CMD, DAT[0], DAT[1], DAT[2] and DAT[3].
138 $ref: /schemas/types.yaml#/definitions/flag
139 description: ST Micro-specific property, data and command phase relation,
140 generated on the sd clock falling edge.
143 $ref: /schemas/types.yaml#/definitions/flag
144 description: ST Micro-specific property, use CKIN pin from an external
145 driver to sample the receive data (for example with a voltage switch
151 The GPIO matching the CMD pin.
156 The GPIO matching the CK pin.
161 The GPIO matching the CKIN pin.
164 st,cmd-gpios: [ "st,use-ckin" ]
165 st,ck-gpios: [ "st,use-ckin" ]
166 st,ckin-gpios: [ "st,use-ckin" ]
168 unevaluatedProperties: false
177 #include <dt-bindings/interrupt-controller/irq.h>
178 #include <dt-bindings/gpio/gpio.h>
181 compatible = "arm,pl180", "arm,primecell";
182 reg = <0x5000 0x1000>;
183 interrupts-extended = <&vic 22 &sic 1>;
184 clocks = <&xtal24mhz>, <&pclk>;
185 clock-names = "mclk", "apb_pclk";
189 #include <dt-bindings/interrupt-controller/irq.h>
192 compatible = "arm,pl18x", "arm,primecell";
193 reg = <0x80126000 0x1000>;
194 interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>;
195 dmas = <&dma 29 0 0x2>, <&dma 29 0 0x0>;
196 dma-names = "rx", "tx";
197 clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>;
198 clock-names = "sdi", "apb_pclk";
199 max-frequency = <100000000>;
203 cd-gpios = <&gpio2 31 0x4>;
208 vmmc-supply = <&ab8500_ldo_aux3_reg>;
209 vqmmc-supply = <&vmmci>;
214 compatible = "arm,pl18x", "arm,primecell";
215 reg = <0x101f6000 0x1000>;
216 clocks = <&sdiclk>, <&pclksdi>;
217 clock-names = "mclk", "apb_pclk";
219 max-frequency = <400000>;
229 vmmc-supply = <&vmmc_regulator>;
234 compatible = "arm,pl18x", "arm,primecell";
235 arm,primecell-periphid = <0x10153180>;
236 reg = <0x52007000 0x1000>;
239 clock-names = "apb_pclk";
243 max-frequency = <120000000>;