arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / Documentation / devicetree / bindings / misc / qcom,fastrpc.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/misc/qcom,fastrpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Qualcomm FastRPC Driver
8
9 maintainers:
10   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12 description: |
13   The FastRPC implements an IPC (Inter-Processor Communication)
14   mechanism that allows for clients to transparently make remote method
15   invocations across DSP and APPS boundaries. This enables developers
16   to offload tasks to the DSP and free up the application processor for
17   other tasks.
18
19 properties:
20   compatible:
21     const: qcom,fastrpc
22
23   label:
24     enum:
25       - adsp
26       - mdsp
27       - sdsp
28       - cdsp
29
30   memory-region:
31     maxItems: 1
32     description:
33       Phandle to a node describing memory to be used for remote heap CMA.
34
35   qcom,glink-channels:
36     description:
37       A list of channels tied to this function, used for matching
38       the function to a set of virtual channels.
39     $ref: /schemas/types.yaml#/definitions/string-array
40     items:
41       - const: fastrpcglink-apps-dsp
42
43   qcom,non-secure-domain:
44     description:
45       Used to mark the current domain as non-secure.
46     type: boolean
47
48   qcom,smd-channels:
49     description:
50       Channel name used for the RPM communication
51     $ref: /schemas/types.yaml#/definitions/string-array
52     items:
53       - const: fastrpcsmd-apps-dsp
54
55   qcom,vmids:
56     description:
57       Virtual machine IDs for remote processor.
58     $ref: /schemas/types.yaml#/definitions/uint32-array
59
60   "#address-cells":
61     const: 1
62
63   "#size-cells":
64     const: 0
65
66 patternProperties:
67   "(compute-)?cb@[0-9]*$":
68     type: object
69
70     description: >
71       Each subnode of the Fastrpc represents compute context banks available on the dsp.
72
73     properties:
74       compatible:
75         const: qcom,fastrpc-compute-cb
76
77       reg:
78         maxItems: 1
79
80       iommus:
81         minItems: 1
82         maxItems: 3
83
84       qcom,nsessions:
85         $ref: /schemas/types.yaml#/definitions/uint32
86         default: 1
87         description: >
88           A value indicating how many sessions can share this context bank.
89
90     required:
91       - compatible
92       - reg
93
94     additionalProperties: false
95
96 required:
97   - compatible
98   - label
99   - "#address-cells"
100   - "#size-cells"
101
102 additionalProperties: false
103
104 examples:
105   - |
106     #include <dt-bindings/interrupt-controller/arm-gic.h>
107     #include <dt-bindings/mailbox/qcom-ipcc.h>
108
109     glink-edge {
110         interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
111                                      IPCC_MPROC_SIGNAL_GLINK_QMP
112                                      IRQ_TYPE_EDGE_RISING>;
113         mboxes = <&ipcc IPCC_CLIENT_LPASS
114                         IPCC_MPROC_SIGNAL_GLINK_QMP>;
115         label = "lpass";
116         qcom,remote-pid = <2>;
117
118         fastrpc {
119             compatible = "qcom,fastrpc";
120             qcom,glink-channels = "fastrpcglink-apps-dsp";
121             label = "sdsp";
122             qcom,non-secure-domain;
123             #address-cells = <1>;
124             #size-cells = <0>;
125
126             compute-cb@1 {
127                 compatible = "qcom,fastrpc-compute-cb";
128                 reg = <1>;
129                 iommus = <&apps_smmu 0x0541 0x0>;
130             };
131
132             compute-cb@2 {
133                 compatible = "qcom,fastrpc-compute-cb";
134                 reg = <2>;
135                 iommus = <&apps_smmu 0x0542 0x0>;
136             };
137
138             compute-cb@3 {
139                 compatible = "qcom,fastrpc-compute-cb";
140                 reg = <3>;
141                 iommus = <&apps_smmu 0x0543 0x0>;
142             };
143         };
144     };