1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Timers
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
12 by a programmable prescaler, break input feature, PWM outputs and
13 complementary PWM outputs channels.
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
17 programmable prescaler.
20 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
24 const: st,stm32-timers
45 enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
72 additionalProperties: false
83 One or two <index level filter> to describe break input
85 $ref: /schemas/types.yaml#/definitions/uint32-matrix
89 "index" indicates on which break input (0 or 1) the
90 configuration should be applied.
93 "level" gives the active level (0=low or 1=high) of the
94 input signal for this configuration
97 "filter" gives the filtering value (up to 15) to be applied.
108 additionalProperties: false
112 const: st,stm32-timer-counter
120 additionalProperties: false
125 - st,stm32-timer-trigger
126 - st,stm32h7-timer-trigger
129 description: Identify trigger hardware block.
144 additionalProperties: false
148 #include <dt-bindings/clock/stm32mp1-clks.h>
149 timers2: timer@40000000 {
150 #address-cells = <1>;
152 compatible = "st,stm32-timers";
153 reg = <0x40000000 0x400>;
154 clocks = <&rcc TIM2_K>;
156 dmas = <&dmamux1 18 0x400 0x1>,
157 <&dmamux1 19 0x400 0x1>,
158 <&dmamux1 20 0x400 0x1>,
159 <&dmamux1 21 0x400 0x1>,
160 <&dmamux1 22 0x400 0x1>;
161 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
163 compatible = "st,stm32-pwm";
165 st,breakinput = <0 1 5>;
168 compatible = "st,stm32-timer-trigger";
172 compatible = "st,stm32-timer-counter";