1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ocelot Externally-Controlled Ethernet Switch
10 - Colin Foster <colin.foster@in-advantage.com>
13 The Ocelot ethernet switch family contains chips that have an internal CPU
14 (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have
15 the option to be controlled externally via external interfaces like SPI or
18 The switch family is a multi-port networking switch that supports many
19 interfaces. Additionally, the device can perform pin control, MDIO buses, and
20 external GPIO expanders.
40 "^pinctrl@[0-9a-f]+$":
42 $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml
46 $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml
54 $ref: /schemas/net/mscc,miim.yaml
60 "^ethernet-switch@[0-9a-f]+$":
62 $ref: /schemas/net/mscc,vsc7514-switch.yaml
63 unevaluatedProperties: false
75 additionalProperties: false
79 ocelot_clock: ocelot-clock {
80 compatible = "fixed-clock";
82 clock-frequency = <125000000>;
90 compatible = "mscc,vsc7512";
91 spi-max-frequency = <2500000>;
97 compatible = "mscc,ocelot-miim";
100 reg = <0x7107009c 0x24>;
102 sw_phy0: ethernet-phy@0 {
108 compatible = "mscc,ocelot-miim";
109 pinctrl-names = "default";
110 pinctrl-0 = <&miim1_pins>;
111 #address-cells = <1>;
113 reg = <0x710700c0 0x24>;
115 sw_phy4: ethernet-phy@4 {
120 gpio: pinctrl@71070034 {
121 compatible = "mscc,ocelot-pinctrl";
124 gpio-ranges = <&gpio 0 0 22>;
125 reg = <0x71070034 0x6c>;
127 sgpio_pins: sgpio-pins {
128 pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";
132 miim1_pins: miim1-pins {
133 pins = "GPIO_14", "GPIO_15";
139 compatible = "mscc,ocelot-sgpio";
140 #address-cells = <1>;
142 bus-frequency = <12500000>;
143 clocks = <&ocelot_clock>;
144 microchip,sgpio-port-ranges = <0 15>;
145 pinctrl-names = "default";
146 pinctrl-0 = <&sgpio_pins>;
147 reg = <0x710700f8 0x100>;
150 compatible = "microchip,sparx5-sgpio-bank";
158 compatible = "microchip,sparx5-sgpio-bank";