1 MAX77620 Power management IC from Maxim Semiconductor.
5 - compatible: Must be one of
8 - reg: I2C device address.
12 - interrupts: The interrupt on the parent the controller is
14 - interrupt-controller: Marks the device node as an interrupt controller.
15 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
16 variant of <../interrupt-controller/interrupts.txt>
17 IRQ numbers for different interrupt source of MAX77620
18 are defined at dt-bindings/mfd/max77620.h.
20 Optional subnodes and their properties:
21 =======================================
23 Flexible power sequence configurations:
24 --------------------------------------
25 The Flexible Power Sequencer (FPS) allows each regulator to power up under
26 hardware or software control. Additionally, each regulator can power on
27 independently or among a group of other regulators with an adjustable power-up
28 and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
29 to be part of a sequence allowing external regulators to be sequenced along
30 with internal regulators. 32KHz clock can be programmed to be part of a
33 The flexible sequencing structure consists of two hardware enable inputs
34 (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
35 Each master sequencing timer is programmable through its configuration
36 register to have a hardware enable source (EN1 or EN2) or a software enable
37 source (SW). When enabled/disabled, the master sequencing timer generates
38 eight sequencing events on different time periods called slots. The time
39 period between each event is programmable within the configuration register.
40 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
41 sequence slave register which allows its enable source to be specified as
42 a flexible power sequencer timer or a software bit. When a FPS source of
43 regulators, GPIOs and clocks specifies the enable source to be a flexible
44 power sequencer, the power up and power down delays can be specified in
45 the regulators, GPIOs and clocks flexible power sequencer configuration
48 When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
49 clock are set into following state at the sequencing event that
50 corresponds to its flexible sequencer configuration register.
51 Sleep state: In this state, regulators, GPIOs
52 and 32KHz clock get disabled at
54 Global Low Power Mode (GLPM): In this state, regulators are set in
55 low power mode at the sequencing event.
57 The configuration parameters of FPS is provided through sub-node "fps"
58 and their child for FPS specific. The child node name for FPS are "fps0",
59 "fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.
61 The FPS configurations like FPS source, power up and power down slots for
62 regulators, GPIOs and 32kHz clocks are provided in their respective
63 configuration nodes which is explained in respective sub-system DT
66 There is need for different FPS configuration parameters based on system
67 state like when system state changed from active to suspend or active to
72 -maxim,fps-event-source: u32, FPS event source like external
73 hardware input to PMIC i.e. EN0, EN1 or
75 The macros are defined on
76 dt-bindings/mfd/max77620.h
77 for different control source.
78 - MAX77620_FPS_EVENT_SRC_EN0
79 for hardware input pin EN0.
80 - MAX77620_FPS_EVENT_SRC_EN1
81 for hardware input pin EN1.
82 - MAX77620_FPS_EVENT_SRC_SW
85 -maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds
86 when system enters in to shutdown
89 -maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds
90 when system enters in to suspend state.
92 -maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS
93 event cleared (set to LOW) whether it
94 should go to sleep state or low-power
95 state. Following are valid values:
96 - MAX77620_FPS_INACTIVE_STATE_SLEEP
97 to set the PMIC state to sleep.
98 - MAX77620_FPS_INACTIVE_STATE_LOW_POWER
99 to set the PMIC state to low
101 Absence of this property or other value
102 will not change device state when FPS
105 Here supported time periods by device in microseconds are as follows:
106 MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
107 MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
109 -maxim,power-ok-control: configure map power ok bit
110 1: Enables POK(Power OK) to control nRST_IO and GPIO1
112 0: Disables POK control.
113 if property missing, do not configure MPOK bit.
114 If POK mapping is enabled for GPIO1/nRST_IO then,
115 GPIO1/nRST_IO pins are HIGH only if all rails
116 that have POK control enabled are HIGH.
117 If any of the rails goes down(which are enabled for POK
118 control) then, GPIO1/nRST_IO goes LOW.
119 this property is valid for max20024 only.
121 For DT binding details of different sub modules like GPIO, pincontrol,
122 regulator, power, please refer respective device-tree binding document
123 under their respective sub-system directories.
127 #include <dt-bindings/mfd/max77620.h>
130 compatible = "maxim,max77620";
133 interrupt-parent = <&intc>;
134 interrupts = <0 86 IRQ_TYPE_NONE>;
136 interrupt-controller;
137 #interrupt-cells = <2>;
141 maxim,shutdown-fps-time-period-us = <1280>;
142 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
146 maxim,shutdown-fps-time-period-us = <1280>;
147 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
151 maxim,shutdown-fps-time-period-us = <1280>;
152 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;