arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / Documentation / devicetree / bindings / mfd / brcm,bcm6358-gpio-sysctl.yaml
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Broadcom BCM6358 GPIO System Controller
8
9 maintainers:
10   - Álvaro Fernández Rojas <noltari@gmail.com>
11   - Jonas Gorski <jonas.gorski@gmail.com>
12
13 description:
14   Broadcom BCM6358 SoC GPIO system controller which provides a register map
15   for controlling the GPIO and pins of the SoC.
16
17 properties:
18   "#address-cells": true
19
20   "#size-cells": true
21
22   compatible:
23     items:
24       - const: brcm,bcm6358-gpio-sysctl
25       - const: syscon
26       - const: simple-mfd
27
28   ranges:
29     maxItems: 1
30
31   reg:
32     maxItems: 1
33
34 patternProperties:
35   "^gpio@[0-9a-f]+$":
36     # Child node
37     type: object
38     $ref: /schemas/gpio/brcm,bcm63xx-gpio.yaml
39     description:
40       GPIO controller for the SoC GPIOs. This child node definition
41       should follow the bindings specified in
42       Documentation/devicetree/bindings/gpio/brcm,bcm63xx-gpio.yaml.
43
44   "^pinctrl@[0-9a-f]+$":
45     # Child node
46     type: object
47     $ref: /schemas/pinctrl/brcm,bcm6358-pinctrl.yaml
48     description:
49       Pin controller for the SoC pins. This child node definition
50       should follow the bindings specified in
51       Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml.
52
53 required:
54   - "#address-cells"
55   - compatible
56   - ranges
57   - reg
58   - "#size-cells"
59
60 additionalProperties: false
61
62 examples:
63   - |
64     syscon@fffe0080 {
65       #address-cells = <1>;
66       #size-cells = <1>;
67       compatible = "brcm,bcm6358-gpio-sysctl", "syscon", "simple-mfd";
68       reg = <0xfffe0080 0x80>;
69       ranges = <0 0xfffe0080 0x80>;
70
71       gpio@0 {
72         compatible = "brcm,bcm6358-gpio";
73         reg-names = "dirout", "dat";
74         reg = <0x0 0x8>, <0x8 0x8>;
75
76         gpio-controller;
77         gpio-ranges = <&pinctrl 0 0 40>;
78         #gpio-cells = <2>;
79       };
80
81       pinctrl: pinctrl@18 {
82         compatible = "brcm,bcm6358-pinctrl";
83         reg = <0x18 0x4>;
84
85         pinctrl_ebi_cs: ebi_cs-pins {
86           function = "ebi_cs";
87           groups = "ebi_cs_grp";
88         };
89
90         pinctrl_uart1: uart1-pins {
91           function = "uart1";
92           groups = "uart1_grp";
93         };
94
95         pinctrl_serial_led: serial_led-pins {
96           function = "serial_led";
97           groups = "serial_led_grp";
98         };
99
100         pinctrl_legacy_led: legacy_led-pins {
101           function = "legacy_led";
102           groups = "legacy_led_grp";
103         };
104
105         pinctrl_led: led-pins {
106           function = "led";
107           groups = "led_grp";
108         };
109
110         pinctrl_spi_cs_23: spi_cs-pins {
111           function = "spi_cs";
112           groups = "spi_cs_grp";
113         };
114
115         pinctrl_utopia: utopia-pins {
116           function = "utopia";
117           groups = "utopia_grp";
118         };
119
120         pinctrl_pwm_syn_clk: pwm_syn_clk-pins {
121           function = "pwm_syn_clk";
122           groups = "pwm_syn_clk_grp";
123         };
124
125         pinctrl_sys_irq: sys_irq-pins {
126           function = "sys_irq";
127           groups = "sys_irq_grp";
128         };
129       };
130     };