arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / Documentation / devicetree / bindings / mfd / aspeed,ast2x00-scu.yaml
1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Aspeed System Control Unit
8
9 description:
10   The Aspeed System Control Unit manages the global behaviour of the SoC,
11   configuring elements such as clocks, pinmux, and reset.
12
13 maintainers:
14   - Joel Stanley <joel@jms.id.au>
15   - Andrew Jeffery <andrew@aj.id.au>
16
17 properties:
18   compatible:
19     items:
20       - enum:
21           - aspeed,ast2400-scu
22           - aspeed,ast2500-scu
23           - aspeed,ast2600-scu
24       - const: syscon
25       - const: simple-mfd
26
27   reg:
28     maxItems: 1
29
30   ranges: true
31
32   '#address-cells':
33     const: 1
34
35   '#size-cells':
36     const: 1
37
38   '#clock-cells':
39     const: 1
40
41   '#reset-cells':
42     const: 1
43
44 patternProperties:
45   '^p2a-control@[0-9a-f]+$':
46     description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
47     type: object
48
49   '^pinctrl(@[0-9a-f]+)?$':
50     oneOf:
51       - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml
52       - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml
53       - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml
54
55   '^interrupt-controller@[0-9a-f]+$':
56     description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
57     type: object
58
59   '^silicon-id@[0-9a-f]+$':
60     description: Unique hardware silicon identifiers within the SoC
61     type: object
62     additionalProperties: false
63
64     properties:
65       compatible:
66         items:
67           - enum:
68               - aspeed,ast2400-silicon-id
69               - aspeed,ast2500-silicon-id
70               - aspeed,ast2600-silicon-id
71           - const: aspeed,silicon-id
72
73       reg:
74         description:
75           The reg should be the unique silicon id register, and not backwards
76           compatible one in eg. the 2600.
77         minItems: 1
78         items:
79           - description: silicon id information registers
80           - description: unique chip id registers
81
82 required:
83   - compatible
84   - reg
85   - ranges
86   - '#address-cells'
87   - '#size-cells'
88   - '#clock-cells'
89   - '#reset-cells'
90
91 additionalProperties: false
92
93 examples:
94   - |
95     syscon@1e6e2000 {
96         compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
97         reg = <0x1e6e2000 0x1a8>;
98         #clock-cells = <1>;
99         #reset-cells = <1>;
100
101         #address-cells = <1>;
102         #size-cells = <1>;
103         ranges = <0x0 0x1e6e2000 0x1000>;
104
105         silicon-id@7c {
106             compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
107             reg = <0x7c 0x4>, <0x150 0x8>;
108         };
109     };
110 ...