1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14 be accessed via the external address space read mode or the manual mode.
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
17 The flash interface is selected based on the "compatible" property of this
19 - if it contains "jedec,spi-nor", then SPI is used;
20 - if it contains "cfi-flash", then HyperFlash is used.
23 - $ref: "/schemas/spi/spi-controller.yaml#"
30 - renesas,r8a774a1-rpc-if # RZ/G2M
31 - renesas,r8a774b1-rpc-if # RZ/G2N
32 - renesas,r8a774c0-rpc-if # RZ/G2E
33 - renesas,r8a774e1-rpc-if # RZ/G2H
34 - renesas,r8a7795-rpc-if # R-Car H3
35 - renesas,r8a7796-rpc-if # R-Car M3-W
36 - renesas,r8a77961-rpc-if # R-Car M3-W+
37 - renesas,r8a77965-rpc-if # R-Car M3-N
38 - renesas,r8a77970-rpc-if # R-Car V3M
39 - renesas,r8a77980-rpc-if # R-Car V3H
40 - renesas,r8a77990-rpc-if # R-Car E3
41 - renesas,r8a77995-rpc-if # R-Car D3
42 - renesas,r8a779a0-rpc-if # R-Car V3U
43 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
47 - renesas,r9a07g043-rpc-if # RZ/G2UL
48 - renesas,r9a07g044-rpc-if # RZ/G2{L,LC}
49 - renesas,r9a07g054-rpc-if # RZ/V2L
50 - const: renesas,rzg2l-rpc-if
54 - description: RPC-IF registers
55 - description: direct mapping read mode area
56 - description: write buffer area
100 - renesas,rzg2l-rpc-if
105 - description: SPI Multi IO Register access clock (SPI_CLK2)
106 - description: SPI Multi IO Main clock (SPI_CLK).
113 unevaluatedProperties: false
117 #include <dt-bindings/clock/renesas-cpg-mssr.h>
118 #include <dt-bindings/power/r8a77995-sysc.h>
121 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
122 reg = <0xee200000 0x200>,
123 <0x08000000 0x4000000>,
125 reg-names = "regs", "dirmap", "wbuf";
126 clocks = <&cpg CPG_MOD 917>;
127 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
129 #address-cells = <1>;
133 compatible = "jedec,spi-nor";
135 spi-max-frequency = <40000000>;
136 spi-tx-bus-width = <1>;
137 spi-rx-bus-width = <1>;