1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek Inc.
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SMI (Smart Multimedia Interface) Common
11 - Yong Wu <yong.wu@mediatek.com>
14 The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
16 MediaTek SMI have two generations of HW architecture, here is the list
17 which generation the SoCs use:
18 generation 1: mt2701 and mt7623.
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
21 There's slight differences between the two SMI, for generation 2, the
22 register which control the iommu port is at each larb's register base. But
23 for generation 1, the register is at smi ao base(smi always on register
24 base). Besides that, the smi async clock should be prepared and enabled for
25 SMI generation 1 to transform the smi clock into emi clock domain, but that is
26 not needed for SMI generation 2.
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
34 - mediatek,mt6779-smi-common
35 - mediatek,mt6795-smi-common
36 - mediatek,mt8167-smi-common
37 - mediatek,mt8173-smi-common
38 - mediatek,mt8183-smi-common
39 - mediatek,mt8186-smi-common
40 - mediatek,mt8188-smi-common-vdo
41 - mediatek,mt8188-smi-common-vpp
42 - mediatek,mt8192-smi-common
43 - mediatek,mt8195-smi-common-vdo
44 - mediatek,mt8195-smi-common-vpp
45 - mediatek,mt8195-smi-sub-common
47 - description: for mt7623
49 - const: mediatek,mt7623-smi-common
50 - const: mediatek,mt2701-smi-common
60 apb and smi are mandatory. the async is only for generation 1 smi HW.
61 gals(global async local sync) also is optional, see below.
64 - description: apb is Advanced Peripheral Bus clock, It's the clock for
66 - description: smi is the clock for transfer data and command.
67 - description: Either asynchronous clock to help transform the smi clock
68 into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
69 - description: gals1 is the path1 clock of gals.
76 $ref: /schemas/types.yaml#/definitions/phandle
77 description: a phandle to the smi-common node above. Only for sub-common.
87 - if: # only for gen1 HW
92 - mediatek,mt2701-smi-common
104 - if: # only for sub common
109 - mediatek,mt8195-smi-sub-common
126 - if: # for gen2 HW that have gals
130 - mediatek,mt6779-smi-common
131 - mediatek,mt8183-smi-common
132 - mediatek,mt8186-smi-common
133 - mediatek,mt8192-smi-common
134 - mediatek,mt8195-smi-common-vdo
135 - mediatek,mt8195-smi-common-vpp
149 - if: # for gen2 HW that don't have gals
153 - mediatek,mt2712-smi-common
154 - mediatek,mt6795-smi-common
155 - mediatek,mt8167-smi-common
156 - mediatek,mt8173-smi-common
168 additionalProperties: false
172 #include <dt-bindings/clock/mt8173-clk.h>
173 #include <dt-bindings/power/mt8173-power.h>
175 smi_common: smi@14022000 {
176 compatible = "mediatek,mt8173-smi-common";
177 reg = <0x14022000 0x1000>;
178 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
179 clocks = <&mmsys CLK_MM_SMI_COMMON>,
180 <&mmsys CLK_MM_SMI_COMMON>;
181 clock-names = "apb", "smi";