Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Peripheral properties for Intel IXP4xx Expansion Bus
   8
   9 description:
  10   The IXP4xx expansion bus controller handles access to devices on the
  11   memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
  12   including IXP42x, IXP43x, IXP45x and IXP46x.
  13
  14 maintainers:
  15   - Linus Walleij <linus.walleij@linaro.org>
  16
  17 properties:
  18   intel,ixp4xx-eb-t1:
  19     description: Address timing, extend address phase with n cycles.
  20     $ref: /schemas/types.yaml#/definitions/uint32
  21     maximum: 3
  22
  23   intel,ixp4xx-eb-t2:
  24     description: Setup chip select timing, extend setup phase with n cycles.
  25     $ref: /schemas/types.yaml#/definitions/uint32
  26     maximum: 3
  27
  28   intel,ixp4xx-eb-t3:
  29     description: Strobe timing, extend strobe phase with n cycles.
  30     $ref: /schemas/types.yaml#/definitions/uint32
  31     maximum: 15
  32
  33   intel,ixp4xx-eb-t4:
  34     description: Hold timing, extend hold phase with n cycles.
  35     $ref: /schemas/types.yaml#/definitions/uint32
  36     maximum: 3
  37
  38   intel,ixp4xx-eb-t5:
  39     description: Recovery timing, extend recovery phase with n cycles.
  40     $ref: /schemas/types.yaml#/definitions/uint32
  41     maximum: 15
  42
  43   intel,ixp4xx-eb-cycle-type:
  44     description: The type of cycles to use on the expansion bus for this
  45       chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.
  46     $ref: /schemas/types.yaml#/definitions/uint32
  47     enum: [0, 1, 2]
  48
  49   intel,ixp4xx-eb-byte-access-on-halfword:
  50     description: Allow byte read access on half word devices.
  51     $ref: /schemas/types.yaml#/definitions/uint32
  52     enum: [0, 1]
  53
  54   intel,ixp4xx-eb-hpi-hrdy-pol-high:
  55     description: Set HPI HRDY polarity to active high when using HPI.
  56     $ref: /schemas/types.yaml#/definitions/uint32
  57     enum: [0, 1]
  58
  59   intel,ixp4xx-eb-mux-address-and-data:
  60     description: Multiplex address and data on the data bus.
  61     $ref: /schemas/types.yaml#/definitions/uint32
  62     enum: [0, 1]
  63
  64   intel,ixp4xx-eb-ahb-split-transfers:
  65     description: Enable AHB split transfers.
  66     $ref: /schemas/types.yaml#/definitions/uint32
  67     enum: [0, 1]
  68
  69   intel,ixp4xx-eb-write-enable:
  70     description: Enable write cycles.
  71     $ref: /schemas/types.yaml#/definitions/uint32
  72     enum: [0, 1]
  73
  74   intel,ixp4xx-eb-byte-access:
  75     description: Expansion bus uses only 8 bits. The default is to use
  76       16 bits.
  77     $ref: /schemas/types.yaml#/definitions/uint32
  78     enum: [0, 1]
  79
  80 additionalProperties: true