1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR3 SDRAM AC timing parameters for a given speed-bin
10 - Krzysztof Kozlowski <krzk@kernel.org>
14 const: jedec,lpddr3-timings
19 Maximum DDR clock frequency for the speed-bin, in Hz.
20 Property is deprecated, use max-freq.
24 $ref: /schemas/types.yaml#/definitions/uint32
26 Maximum DDR clock frequency for the speed-bin, in Hz.
29 $ref: /schemas/types.yaml#/definitions/uint32
31 Minimum DDR clock frequency for the speed-bin, in Hz.
34 $ref: /schemas/types.yaml#/definitions/uint32
36 CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds.
39 $ref: /schemas/types.yaml#/definitions/uint32
41 CKE minimum pulse width during SELF REFRESH (low pulse width during
42 SELF REFRESH) in pico seconds.
45 $ref: /schemas/types.yaml#/definitions/uint32
47 Four-bank activate window in pico seconds.
50 $ref: /schemas/types.yaml#/definitions/uint32
52 Mode register set command delay in pico seconds.
55 $ref: /schemas/types.yaml#/definitions/uint32
57 Additional READ-to-READ delay in chip-to-chip cases in pico seconds.
60 $ref: /schemas/types.yaml#/definitions/uint32
62 Row active time in pico seconds.
65 $ref: /schemas/types.yaml#/definitions/uint32
67 ACTIVATE-to-ACTIVATE command period in pico seconds.
70 $ref: /schemas/types.yaml#/definitions/uint32
72 RAS-to-CAS delay in pico seconds.
75 $ref: /schemas/types.yaml#/definitions/uint32
77 Refresh Cycle time in pico seconds.
80 $ref: /schemas/types.yaml#/definitions/uint32
82 Row precharge time (all banks) in pico seconds.
85 $ref: /schemas/types.yaml#/definitions/uint32
87 Row precharge time (single banks) in pico seconds.
90 $ref: /schemas/types.yaml#/definitions/uint32
92 Active bank A to active bank B in pico seconds.
95 $ref: /schemas/types.yaml#/definitions/uint32
97 Internal READ to PRECHARGE command delay in pico seconds.
100 $ref: /schemas/types.yaml#/definitions/uint32
102 Additional WRITE-to-WRITE delay in chip-to-chip cases in pico seconds.
105 $ref: /schemas/types.yaml#/definitions/uint32
107 WRITE recovery time in pico seconds.
110 $ref: /schemas/types.yaml#/definitions/uint32
112 Internal WRITE-to-READ command delay in pico seconds.
115 $ref: /schemas/types.yaml#/definitions/uint32
117 Exit power-down to next valid command delay in pico seconds.
120 $ref: /schemas/types.yaml#/definitions/uint32
122 SELF REFRESH exit to next valid command delay in pico seconds.
129 additionalProperties: false
135 compatible = "jedec,lpddr3-timings";
136 max-freq = <800000000>;
137 min-freq = <100000000>;