1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
14 The PL353 Static Memory Controller is a bus where you can connect two kinds
15 of memory interfaces, which are NAND and memory mapped interfaces (such as
18 # We need a select here so we don't match all nodes with 'arm,primecell'
23 const: arm,pl353-smc-r2p1
29 pattern: "^memory-controller@[0-9a-f]+$"
33 - const: arm,pl353-smc-r2p1
34 - const: arm,primecell
45 Configuration registers for the host and sub-controllers.
46 The three chip select regions are defined in 'ranges'.
50 - description: clock for the memory device bus
51 - description: main clock of the SMC
61 Memory bus areas for interacting with the devices. Reflects
62 the memory layout with four integer values following:
63 <cs-number> 0 <offset> <size>
65 - description: NAND bank 0
66 - description: NOR/SRAM bank 0
67 - description: NOR/SRAM bank 1
75 The child device node represents the controller connected to the SMC
76 bus. The controller can be a NAND controller or a pair of any memory
77 mapped controllers such as NOR and SRAM controllers.
82 Compatible of memory controller.
88 Chip-select ID, as in the parent range property.
92 Offset of the memory region requested by the device.
94 Length of the memory region requested by the device.
109 additionalProperties: false
113 smcc: memory-controller@e000e000 {
114 compatible = "arm,pl353-smc-r2p1", "arm,primecell";
115 reg = <0xe000e000 0x0001000>;
116 clock-names = "memclk", "apb_pclk";
117 clocks = <&clkc 11>, <&clkc 44>;
118 ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
119 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
120 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
121 #address-cells = <2>;
124 nfc0: nand-controller@0,0 {
125 compatible = "arm,pl353-nand-r2p1";
126 reg = <0 0 0x1000000>;
127 #address-cells = <1>;