1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 Each FIMC device should have an alias in the aliases node, in the form of
15 fimc<n>, where <n> is an integer specifying the IP block instance.
20 - samsung,exynos4210-fimc
21 - samsung,exynos4212-fimc
22 - samsung,s5pv210-fimc
37 Maximum FIMC local clock (LCLK) frequency.
51 The FIMC IP block includes the camera input interface.
56 The FIMC IP block has the ISP writeback input.
61 The FIMC IP block has the LCD writeback input.
63 samsung,mainscaler-ext:
66 FIMC IP supports extended image size and has CIEXTEN register.
68 samsung,min-pix-alignment:
69 $ref: /schemas/types.yaml#/definitions/uint32-array
71 - description: Minimum supported image height alignment.
72 - description: Horizontal image offset.
74 The values are in pixels and default is <2 1>.
76 samsung,min-pix-sizes:
77 $ref: /schemas/types.yaml#/definitions/uint32-array
80 An array specyfing minimum image size in pixels at the FIMC input and
81 output DMA, in the first and second cell respectively. Default value
85 $ref: /schemas/types.yaml#/definitions/uint32-array
88 An array of maximum supported image sizes in pixels, for details refer to
89 Table 2-1 in the S5PV210 SoC User Manual. The meaning of each cell is as
91 0 - scaler input horizontal size
92 1 - input horizontal size for the scaler bypassed
93 2 - REAL_WIDTH without input rotation
94 3 - REAL_HEIGHT with input rotation
97 $ref: /schemas/types.yaml#/definitions/uint32
100 A bitmask specifying whether this IP has the input and the output
101 rotator. Bits 4 and 0 correspond to input and output rotator
102 respectively. If a rotator is present its corresponding bit should be
106 $ref: /schemas/types.yaml#/definitions/phandle
108 System Registers (SYSREG) node.
125 additionalProperties: false
129 #include <dt-bindings/clock/exynos4.h>
130 #include <dt-bindings/interrupt-controller/arm-gic.h>
133 compatible = "samsung,exynos4212-fimc";
134 reg = <0x11800000 0x1000>;
135 clocks = <&clock CLK_FIMC0>,
136 <&clock CLK_SCLK_FIMC0>;
137 clock-names = "fimc", "sclk_fimc";
138 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
139 iommus = <&sysmmu_fimc0>;
140 power-domains = <&pd_cam>;
141 samsung,sysreg = <&sys_reg>;
143 samsung,pix-limits = <4224 8192 1920 4224>;
144 samsung,mainscaler-ext;
148 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
149 <&clock CLK_SCLK_FIMC0>;
150 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
151 assigned-clock-rates = <0>, <176000000>;