1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Hantro G1 VPU codecs implemented on Rockchip SoCs
11 - Ezequiel Garcia <ezequiel@collabora.com>
14 Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
27 - rockchip,rk3588-av1-vpu
29 - const: rockchip,rk3188-vpu
30 - const: rockchip,rk3066-vpu
32 - const: rockchip,rk3228-vpu
33 - const: rockchip,rk3399-vpu
73 - description: AXI reset line
74 - description: AXI bus interface unit reset line
75 - description: APB reset line
76 - description: APB bus interface unit reset line
86 additionalProperties: false
90 #include <dt-bindings/clock/rk3288-cru.h>
91 #include <dt-bindings/interrupt-controller/arm-gic.h>
92 #include <dt-bindings/power/rk3288-power.h>
94 vpu: video-codec@ff9a0000 {
95 compatible = "rockchip,rk3288-vpu";
96 reg = <0xff9a0000 0x800>;
97 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
99 interrupt-names = "vepu", "vdpu";
100 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
101 clock-names = "aclk", "hclk";
102 power-domains = <&power RK3288_PD_VIDEO>;