1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC Image Signal Processing unit v1
10 - Helen Koike <helen.koike@collabora.com>
13 Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs
14 which contains image processing, scaling, and compression functions.
19 - rockchip,px30-cif-isp
20 - rockchip,rk3399-cif-isp
39 - description: ISP clock
40 - description: ISP AXI clock
41 - description: ISP AHB clock
43 - description: ISP Pixel clock
60 description: phandle for the PHY port
69 $ref: /schemas/graph.yaml#/properties/ports
73 $ref: /schemas/graph.yaml#/$defs/port-base
74 unevaluatedProperties: false
75 description: connection point for sensors at MIPI-DPHY RX0
79 $ref: video-interfaces.yaml#
80 unevaluatedProperties: false
107 const: rockchip,rk3399-cif-isp
121 const: rockchip,px30-cif-isp
126 additionalProperties: false
131 #include <dt-bindings/clock/rk3399-cru.h>
132 #include <dt-bindings/interrupt-controller/arm-gic.h>
133 #include <dt-bindings/power/rk3399-power.h>
136 #address-cells = <2>;
139 isp0: isp0@ff910000 {
140 compatible = "rockchip,rk3399-cif-isp";
141 reg = <0x0 0xff910000 0x0 0x4000>;
142 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
143 clocks = <&cru SCLK_ISP0>,
144 <&cru ACLK_ISP0_WRAPPER>,
145 <&cru HCLK_ISP0_WRAPPER>;
146 clock-names = "isp", "aclk", "hclk";
147 iommus = <&isp0_mmu>;
150 power-domains = <&power RK3399_PD_ISP0>;
153 #address-cells = <1>;
158 #address-cells = <1>;
161 mipi_in_wcam: endpoint@0 {
163 remote-endpoint = <&wcam_out>;
167 mipi_in_ucam: endpoint@1 {
169 remote-endpoint = <&ucam_out>;
177 #address-cells = <1>;
181 compatible = "ovti,ov5695";
186 remote-endpoint = <&mipi_in_wcam>;
193 compatible = "ovti,ov2685";
198 remote-endpoint = <&mipi_in_ucam>;
208 #include <dt-bindings/interrupt-controller/arm-gic.h>
209 #include <dt-bindings/power/px30-power.h>
212 #address-cells = <2>;
216 compatible = "rockchip,px30-cif-isp";
217 reg = <0x0 0xff4a0000 0x0 0x8000>;
218 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
219 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
220 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
221 interrupt-names = "isp", "mi", "mipi";
222 clocks = <&cru SCLK_ISP0>,
223 <&cru ACLK_ISP0_WRAPPER>,
224 <&cru HCLK_ISP0_WRAPPER>,
225 <&cru PCLK_ISP1_WRAPPER>;
226 clock-names = "isp", "aclk", "hclk", "pclk";
230 power-domains = <&power PX30_PD_VI>;
233 #address-cells = <1>;
238 #address-cells = <1>;
241 mipi_in_ucam1: endpoint@0 {
243 remote-endpoint = <&ucam1_out>;
251 #address-cells = <1>;
255 compatible = "ovti,ov5647";
257 clocks = <&cru SCLK_CIF_OUT>;
260 ucam1_out: endpoint {
261 remote-endpoint = <&mipi_in_ucam1>;