Documentation/devicetree/bindings/media/renesas,vsp1.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/renesas,vsp1.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas VSP Video Processing Engine
   8
   9 maintainers:
  10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11
  12 description:
  13   The VSP is a video processing engine that supports up-/down-scaling, alpha
  14   blending, color space conversion and various other image processing features.
  15   It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - renesas,r9a07g044-vsp2 # RZ/G2L
  21       - renesas,vsp1 # R-Car Gen2 and RZ/G1
  22       - renesas,vsp2 # R-Car Gen3 and RZ/G2
  23
  24   reg:
  25     maxItems: 1
  26
  27   interrupts:
  28     maxItems: 1
  29
  30   clocks: true
  31   clock-names: true
  32
  33   power-domains:
  34     maxItems: 1
  35
  36   resets:
  37     maxItems: 1
  38
  39   renesas,fcp:
  40     $ref: /schemas/types.yaml#/definitions/phandle
  41     description:
  42       A phandle referencing the FCP that handles memory accesses for the VSP.
  43
  44 required:
  45   - compatible
  46   - reg
  47   - interrupts
  48   - clocks
  49   - power-domains
  50   - resets
  51
  52 additionalProperties: false
  53
  54 allOf:
  55   - if:
  56       properties:
  57         compatible:
  58           contains:
  59             const: renesas,vsp1
  60     then:
  61       properties:
  62         renesas,fcp: false
  63     else:
  64       required:
  65         - renesas,fcp
  66
  67   - if:
  68       properties:
  69         compatible:
  70           contains:
  71             const: renesas,r9a07g044-vsp2
  72     then:
  73       properties:
  74         clocks:
  75           items:
  76             - description: Main clock
  77             - description: Register access clock
  78             - description: Video clock
  79         clock-names:
  80           items:
  81             - const: aclk
  82             - const: pclk
  83             - const: vclk
  84       required:
  85         - clock-names
  86     else:
  87       properties:
  88         clocks:
  89           maxItems: 1
  90         clock-names: false
  91
  92 examples:
  93   # R8A7790 (R-Car H2) VSP1-S
  94   - |
  95     #include <dt-bindings/clock/renesas-cpg-mssr.h>
  96     #include <dt-bindings/interrupt-controller/arm-gic.h>
  97     #include <dt-bindings/power/r8a7790-sysc.h>
  98
  99     vsp@fe928000 {
 100         compatible = "renesas,vsp1";
 101         reg = <0xfe928000 0x8000>;
 102         interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
 103         clocks = <&cpg CPG_MOD 131>;
 104         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
 105         resets = <&cpg 131>;
 106     };
 107
 108   # R8A77951 (R-Car H3) VSP2-BC
 109   - |
 110     #include <dt-bindings/clock/renesas-cpg-mssr.h>
 111     #include <dt-bindings/interrupt-controller/arm-gic.h>
 112     #include <dt-bindings/power/r8a7795-sysc.h>
 113
 114     vsp@fe920000 {
 115         compatible = "renesas,vsp2";
 116         reg = <0xfe920000 0x8000>;
 117         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
 118         clocks = <&cpg CPG_MOD 624>;
 119         power-domains = <&sysc R8A7795_PD_A3VP>;
 120         resets = <&cpg 624>;
 121
 122         renesas,fcp = <&fcpvb1>;
 123     };
 124 ...