1 # SPDX-License-Identifier: GPL-2.0-only
2 # Copyright (C) 2020 Renesas Electronics Corp.
5 $id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas R-Car Video Input (VIN)
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
14 The R-Car Video Input (VIN) device provides video input capabilities for the
15 Renesas R-Car family of devices.
17 Each VIN instance has a single parallel input that supports RGB and YUV video,
18 with both external synchronization and BT.656 synchronization for the latter.
19 Depending on the instance the VIN input is connected to external SoC pins, or
20 on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
27 - renesas,vin-r8a7742 # RZ/G1H
28 - renesas,vin-r8a7743 # RZ/G1M
29 - renesas,vin-r8a7744 # RZ/G1N
30 - renesas,vin-r8a7745 # RZ/G1E
31 - renesas,vin-r8a77470 # RZ/G1C
32 - renesas,vin-r8a7790 # R-Car H2
33 - renesas,vin-r8a7791 # R-Car M2-W
34 - renesas,vin-r8a7792 # R-Car V2H
35 - renesas,vin-r8a7793 # R-Car M2-N
36 - renesas,vin-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
41 - renesas,vin-r8a774a1 # RZ/G2M
42 - renesas,vin-r8a774b1 # RZ/G2N
43 - renesas,vin-r8a774c0 # RZ/G2E
44 - renesas,vin-r8a774e1 # RZ/G2H
45 - renesas,vin-r8a7778 # R-Car M1
46 - renesas,vin-r8a7779 # R-Car H1
47 - renesas,vin-r8a7795 # R-Car H3
48 - renesas,vin-r8a7796 # R-Car M3-W
49 - renesas,vin-r8a77961 # R-Car M3-W+
50 - renesas,vin-r8a77965 # R-Car M3-N
51 - renesas,vin-r8a77970 # R-Car V3M
52 - renesas,vin-r8a77980 # R-Car V3H
53 - renesas,vin-r8a77990 # R-Car E3
54 - renesas,vin-r8a77995 # R-Car D3
55 - renesas,vin-r8a779a0 # R-Car V3U
72 #The per-board settings for Gen2 and RZ/G1 platforms:
74 $ref: /schemas/graph.yaml#/$defs/port-base
75 unevaluatedProperties: false
77 A node containing a parallel input
81 $ref: video-interfaces.yaml#
82 unevaluatedProperties: false
87 If both HSYNC and VSYNC polarities are not specified, embedded
88 synchronization is selected.
93 If both HSYNC and VSYNC polarities are not specified, embedded
94 synchronization is selected.
97 field-active-even: true
104 description: Polarity of CLKENB signal
111 #The per-board settings for Gen3 and RZ/G2 platforms:
113 description: VIN channel number
114 $ref: /schemas/types.yaml#/definitions/uint32
119 $ref: /schemas/graph.yaml#/properties/ports
123 $ref: /schemas/graph.yaml#/$defs/port-base
124 unevaluatedProperties: false
126 Input port node, single endpoint describing a parallel input source.
130 $ref: video-interfaces.yaml#
131 unevaluatedProperties: false
136 If both HSYNC and VSYNC polarities are not specified, embedded
137 synchronization is selected.
142 If both HSYNC and VSYNC polarities are not specified, embedded
143 synchronization is selected.
146 field-active-even: true
153 description: Polarity of CLKENB signal
161 $ref: /schemas/graph.yaml#/properties/port
163 Input port node, multiple endpoints describing all the R-Car CSI-2
164 modules connected the VIN.
168 $ref: /schemas/graph.yaml#/properties/endpoint
169 description: Endpoint connected to CSI20.
172 $ref: /schemas/graph.yaml#/properties/endpoint
173 description: Endpoint connected to CSI21.
176 $ref: /schemas/graph.yaml#/properties/endpoint
177 description: Endpoint connected to CSI40.
180 $ref: /schemas/graph.yaml#/properties/endpoint
181 description: Endpoint connected to CSI41.
194 $ref: /schemas/graph.yaml#/properties/port
196 Input port node, multiple endpoints describing all the R-Car ISP
197 modules connected the VIN.
201 $ref: /schemas/graph.yaml#/properties/endpoint
202 description: Endpoint connected to ISP0.
205 $ref: /schemas/graph.yaml#/properties/endpoint
206 description: Endpoint connected to ISP1.
209 $ref: /schemas/graph.yaml#/properties/endpoint
210 description: Endpoint connected to ISP2.
213 $ref: /schemas/graph.yaml#/properties/endpoint
214 description: Endpoint connected to ISP3.
230 - renesas,vin-r8a7778
231 - renesas,vin-r8a7779
241 - renesas,vin-r8a7778
242 - renesas,vin-r8a7779
243 - renesas,rcar-gen2-vin
252 additionalProperties: false
255 # Device node example for Gen2 platform
257 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
258 #include <dt-bindings/interrupt-controller/arm-gic.h>
259 #include <dt-bindings/power/r8a7790-sysc.h>
262 compatible = "renesas,vin-r8a7790",
263 "renesas,rcar-gen2-vin";
264 reg = <0xe6ef1000 0x1000>;
265 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
266 clocks = <&cpg CPG_MOD 810>;
267 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
272 remote-endpoint = <&adv7180>;
278 # Device node example for Gen3 platform with only CSI-2
280 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
281 #include <dt-bindings/interrupt-controller/arm-gic.h>
282 #include <dt-bindings/power/r8a7795-sysc.h>
284 vin0: video@e6ef0000 {
285 compatible = "renesas,vin-r8a7795";
286 reg = <0xe6ef0000 0x1000>;
287 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
288 clocks = <&cpg CPG_MOD 811>;
289 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
294 #address-cells = <1>;
298 #address-cells = <1>;
303 vin0csi20: endpoint@0 {
305 remote-endpoint= <&csi20vin0>;
307 vin0csi40: endpoint@2 {
309 remote-endpoint= <&csi40vin0>;
315 # Device node example for Gen3 platform with CSI-2 and parallel
317 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
318 #include <dt-bindings/interrupt-controller/arm-gic.h>
319 #include <dt-bindings/power/r8a77970-sysc.h>
321 vin2: video@e6ef2000 {
322 compatible = "renesas,vin-r8a77970";
323 reg = <0xe6ef2000 0x1000>;
324 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
325 clocks = <&cpg CPG_MOD 809>;
326 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
331 #address-cells = <1>;
338 remote-endpoint = <&adv7612_out>;
345 #address-cells = <1>;
350 vin2csi40: endpoint@2 {
352 remote-endpoint = <&csi40vin2>;