1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm CAMSS ISP
11 - Robert Foss <robert.foss@linaro.org>
12 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
15 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
19 const: qcom,sdm660-camss
52 - const: csiphy0_timer
53 - const: csiphy1_timer
54 - const: csiphy2_timer
55 - const: csiphy_ahb2crif
92 - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
93 - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
96 $ref: /schemas/graph.yaml#/properties/ports
103 $ref: /schemas/graph.yaml#/$defs/port-base
104 unevaluatedProperties: false
106 Input port for receiving CSI data.
110 $ref: video-interfaces.yaml#
111 unevaluatedProperties: false
122 $ref: /schemas/graph.yaml#/$defs/port-base
123 unevaluatedProperties: false
125 Input port for receiving CSI data.
129 $ref: video-interfaces.yaml#
130 unevaluatedProperties: false
141 $ref: /schemas/graph.yaml#/$defs/port-base
142 unevaluatedProperties: false
144 Input port for receiving CSI data.
148 $ref: video-interfaces.yaml#
149 unevaluatedProperties: false
160 $ref: /schemas/graph.yaml#/$defs/port-base
161 unevaluatedProperties: false
163 Input port for receiving CSI data.
167 $ref: video-interfaces.yaml#
168 unevaluatedProperties: false
190 - const: csiphy0_clk_mux
192 - const: csiphy1_clk_mux
194 - const: csiphy2_clk_mux
201 Definition of the regulator used as analog power supply.
215 additionalProperties: false
219 #include <dt-bindings/interrupt-controller/arm-gic.h>
220 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
221 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
223 camss: camss@ca00000 {
224 compatible = "qcom,sdm660-camss";
226 clocks = <&mmcc CAMSS_AHB_CLK>,
227 <&mmcc CAMSS_CPHY_CSID0_CLK>,
228 <&mmcc CAMSS_CPHY_CSID1_CLK>,
229 <&mmcc CAMSS_CPHY_CSID2_CLK>,
230 <&mmcc CAMSS_CPHY_CSID3_CLK>,
231 <&mmcc CAMSS_CSI0_AHB_CLK>,
232 <&mmcc CAMSS_CSI0_CLK>,
233 <&mmcc CAMSS_CPHY_CSID0_CLK>,
234 <&mmcc CAMSS_CSI0PIX_CLK>,
235 <&mmcc CAMSS_CSI0RDI_CLK>,
236 <&mmcc CAMSS_CSI1_AHB_CLK>,
237 <&mmcc CAMSS_CSI1_CLK>,
238 <&mmcc CAMSS_CPHY_CSID1_CLK>,
239 <&mmcc CAMSS_CSI1PIX_CLK>,
240 <&mmcc CAMSS_CSI1RDI_CLK>,
241 <&mmcc CAMSS_CSI2_AHB_CLK>,
242 <&mmcc CAMSS_CSI2_CLK>,
243 <&mmcc CAMSS_CPHY_CSID2_CLK>,
244 <&mmcc CAMSS_CSI2PIX_CLK>,
245 <&mmcc CAMSS_CSI2RDI_CLK>,
246 <&mmcc CAMSS_CSI3_AHB_CLK>,
247 <&mmcc CAMSS_CSI3_CLK>,
248 <&mmcc CAMSS_CPHY_CSID3_CLK>,
249 <&mmcc CAMSS_CSI3PIX_CLK>,
250 <&mmcc CAMSS_CSI3RDI_CLK>,
251 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
252 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
253 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
254 <&mmcc CSIPHY_AHB2CRIF_CLK>,
255 <&mmcc CAMSS_CSI_VFE0_CLK>,
256 <&mmcc CAMSS_CSI_VFE1_CLK>,
257 <&mmcc CAMSS_ISPIF_AHB_CLK>,
258 <&mmcc THROTTLE_CAMSS_AXI_CLK>,
259 <&mmcc CAMSS_TOP_AHB_CLK>,
260 <&mmcc CAMSS_VFE0_AHB_CLK>,
261 <&mmcc CAMSS_VFE0_CLK>,
262 <&mmcc CAMSS_VFE0_STREAM_CLK>,
263 <&mmcc CAMSS_VFE1_AHB_CLK>,
264 <&mmcc CAMSS_VFE1_CLK>,
265 <&mmcc CAMSS_VFE1_STREAM_CLK>,
266 <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
267 <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
312 interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
313 <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
314 <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
315 <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
316 <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
317 <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
318 <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
319 <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
320 <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
321 <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
323 interrupt-names = "csid0",
334 iommus = <&mmss_smmu 0xc00>,
339 power-domains = <&mmcc CAMSS_VFE0_GDSC>,
340 <&mmcc CAMSS_VFE1_GDSC>;
342 reg = <0x0ca00020 0x10>,
357 reg-names = "csi_clk_mux",
372 vdda-supply = <®_2v8>;
375 #address-cells = <1>;