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[releases.git] / Documentation / devicetree / bindings / media / qcom,sdm660-camss.yaml
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3 %YAML 1.2
4 ---
5 $id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8 title: Qualcomm CAMSS ISP
9
10 maintainers:
11   - Robert Foss <robert.foss@linaro.org>
12   - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13
14 description: |
15   The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
16
17 properties:
18   compatible:
19     const: qcom,sdm660-camss
20
21   clocks:
22     minItems: 42
23     maxItems: 42
24
25   clock-names:
26     items:
27       - const: ahb
28       - const: cphy_csid0
29       - const: cphy_csid1
30       - const: cphy_csid2
31       - const: cphy_csid3
32       - const: csi0_ahb
33       - const: csi0
34       - const: csi0_phy
35       - const: csi0_pix
36       - const: csi0_rdi
37       - const: csi1_ahb
38       - const: csi1
39       - const: csi1_phy
40       - const: csi1_pix
41       - const: csi1_rdi
42       - const: csi2_ahb
43       - const: csi2
44       - const: csi2_phy
45       - const: csi2_pix
46       - const: csi2_rdi
47       - const: csi3_ahb
48       - const: csi3
49       - const: csi3_phy
50       - const: csi3_pix
51       - const: csi3_rdi
52       - const: csiphy0_timer
53       - const: csiphy1_timer
54       - const: csiphy2_timer
55       - const: csiphy_ahb2crif
56       - const: csi_vfe0
57       - const: csi_vfe1
58       - const: ispif_ahb
59       - const: throttle_axi
60       - const: top_ahb
61       - const: vfe0_ahb
62       - const: vfe0
63       - const: vfe0_stream
64       - const: vfe1_ahb
65       - const: vfe1
66       - const: vfe1_stream
67       - const: vfe_ahb
68       - const: vfe_axi
69
70   interrupts:
71     minItems: 10
72     maxItems: 10
73
74   interrupt-names:
75     items:
76       - const: csid0
77       - const: csid1
78       - const: csid2
79       - const: csid3
80       - const: csiphy0
81       - const: csiphy1
82       - const: csiphy2
83       - const: ispif
84       - const: vfe0
85       - const: vfe1
86
87   iommus:
88     maxItems: 4
89
90   power-domains:
91     items:
92       - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
93       - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
94
95   ports:
96     $ref: /schemas/graph.yaml#/properties/ports
97
98     description:
99       CSI input ports.
100
101     properties:
102       port@0:
103         $ref: /schemas/graph.yaml#/$defs/port-base
104         unevaluatedProperties: false
105         description:
106           Input port for receiving CSI data.
107
108         properties:
109           endpoint:
110             $ref: video-interfaces.yaml#
111             unevaluatedProperties: false
112
113             properties:
114               data-lanes:
115                 minItems: 1
116                 maxItems: 4
117
118             required:
119               - data-lanes
120
121       port@1:
122         $ref: /schemas/graph.yaml#/$defs/port-base
123         unevaluatedProperties: false
124         description:
125           Input port for receiving CSI data.
126
127         properties:
128           endpoint:
129             $ref: video-interfaces.yaml#
130             unevaluatedProperties: false
131
132             properties:
133               data-lanes:
134                 minItems: 1
135                 maxItems: 4
136
137             required:
138               - data-lanes
139
140       port@2:
141         $ref: /schemas/graph.yaml#/$defs/port-base
142         unevaluatedProperties: false
143         description:
144           Input port for receiving CSI data.
145
146         properties:
147           endpoint:
148             $ref: video-interfaces.yaml#
149             unevaluatedProperties: false
150
151             properties:
152               data-lanes:
153                 minItems: 1
154                 maxItems: 4
155
156             required:
157               - data-lanes
158
159       port@3:
160         $ref: /schemas/graph.yaml#/$defs/port-base
161         unevaluatedProperties: false
162         description:
163           Input port for receiving CSI data.
164
165         properties:
166           endpoint:
167             $ref: video-interfaces.yaml#
168             unevaluatedProperties: false
169
170             properties:
171               data-lanes:
172                 minItems: 1
173                 maxItems: 4
174
175             required:
176               - data-lanes
177
178   reg:
179     minItems: 14
180     maxItems: 14
181
182   reg-names:
183     items:
184       - const: csi_clk_mux
185       - const: csid0
186       - const: csid1
187       - const: csid2
188       - const: csid3
189       - const: csiphy0
190       - const: csiphy0_clk_mux
191       - const: csiphy1
192       - const: csiphy1_clk_mux
193       - const: csiphy2
194       - const: csiphy2_clk_mux
195       - const: ispif
196       - const: vfe0
197       - const: vfe1
198
199   vdda-supply:
200     description:
201       Definition of the regulator used as analog power supply.
202
203 required:
204   - clock-names
205   - clocks
206   - compatible
207   - interrupt-names
208   - interrupts
209   - iommus
210   - power-domains
211   - reg
212   - reg-names
213   - vdda-supply
214
215 additionalProperties: false
216
217 examples:
218   - |
219     #include <dt-bindings/interrupt-controller/arm-gic.h>
220     #include <dt-bindings/clock/qcom,gcc-sdm660.h>
221     #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
222
223     camss: camss@ca00000 {
224       compatible = "qcom,sdm660-camss";
225
226       clocks = <&mmcc CAMSS_AHB_CLK>,
227         <&mmcc CAMSS_CPHY_CSID0_CLK>,
228         <&mmcc CAMSS_CPHY_CSID1_CLK>,
229         <&mmcc CAMSS_CPHY_CSID2_CLK>,
230         <&mmcc CAMSS_CPHY_CSID3_CLK>,
231         <&mmcc CAMSS_CSI0_AHB_CLK>,
232         <&mmcc CAMSS_CSI0_CLK>,
233         <&mmcc CAMSS_CPHY_CSID0_CLK>,
234         <&mmcc CAMSS_CSI0PIX_CLK>,
235         <&mmcc CAMSS_CSI0RDI_CLK>,
236         <&mmcc CAMSS_CSI1_AHB_CLK>,
237         <&mmcc CAMSS_CSI1_CLK>,
238         <&mmcc CAMSS_CPHY_CSID1_CLK>,
239         <&mmcc CAMSS_CSI1PIX_CLK>,
240         <&mmcc CAMSS_CSI1RDI_CLK>,
241         <&mmcc CAMSS_CSI2_AHB_CLK>,
242         <&mmcc CAMSS_CSI2_CLK>,
243         <&mmcc CAMSS_CPHY_CSID2_CLK>,
244         <&mmcc CAMSS_CSI2PIX_CLK>,
245         <&mmcc CAMSS_CSI2RDI_CLK>,
246         <&mmcc CAMSS_CSI3_AHB_CLK>,
247         <&mmcc CAMSS_CSI3_CLK>,
248         <&mmcc CAMSS_CPHY_CSID3_CLK>,
249         <&mmcc CAMSS_CSI3PIX_CLK>,
250         <&mmcc CAMSS_CSI3RDI_CLK>,
251         <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
252         <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
253         <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
254         <&mmcc CSIPHY_AHB2CRIF_CLK>,
255         <&mmcc CAMSS_CSI_VFE0_CLK>,
256         <&mmcc CAMSS_CSI_VFE1_CLK>,
257         <&mmcc CAMSS_ISPIF_AHB_CLK>,
258         <&mmcc THROTTLE_CAMSS_AXI_CLK>,
259         <&mmcc CAMSS_TOP_AHB_CLK>,
260         <&mmcc CAMSS_VFE0_AHB_CLK>,
261         <&mmcc CAMSS_VFE0_CLK>,
262         <&mmcc CAMSS_VFE0_STREAM_CLK>,
263         <&mmcc CAMSS_VFE1_AHB_CLK>,
264         <&mmcc CAMSS_VFE1_CLK>,
265         <&mmcc CAMSS_VFE1_STREAM_CLK>,
266         <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
267         <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
268
269       clock-names = "ahb",
270         "cphy_csid0",
271         "cphy_csid1",
272         "cphy_csid2",
273         "cphy_csid3",
274         "csi0_ahb",
275         "csi0",
276         "csi0_phy",
277         "csi0_pix",
278         "csi0_rdi",
279         "csi1_ahb",
280         "csi1",
281         "csi1_phy",
282         "csi1_pix",
283         "csi1_rdi",
284         "csi2_ahb",
285         "csi2",
286         "csi2_phy",
287         "csi2_pix",
288         "csi2_rdi",
289         "csi3_ahb",
290         "csi3",
291         "csi3_phy",
292         "csi3_pix",
293         "csi3_rdi",
294         "csiphy0_timer",
295         "csiphy1_timer",
296         "csiphy2_timer",
297         "csiphy_ahb2crif",
298         "csi_vfe0",
299         "csi_vfe1",
300         "ispif_ahb",
301         "throttle_axi",
302         "top_ahb",
303         "vfe0_ahb",
304         "vfe0",
305         "vfe0_stream",
306         "vfe1_ahb",
307         "vfe1",
308         "vfe1_stream",
309         "vfe_ahb",
310         "vfe_axi";
311
312       interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
313         <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
314         <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
315         <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
316         <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
317         <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
318         <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
319         <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
320         <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
321         <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
322
323       interrupt-names = "csid0",
324         "csid1",
325         "csid2",
326         "csid3",
327         "csiphy0",
328         "csiphy1",
329         "csiphy2",
330         "ispif",
331         "vfe0",
332         "vfe1";
333
334       iommus = <&mmss_smmu 0xc00>,
335         <&mmss_smmu 0xc01>,
336         <&mmss_smmu 0xc02>,
337         <&mmss_smmu 0xc03>;
338
339       power-domains = <&mmcc CAMSS_VFE0_GDSC>,
340         <&mmcc CAMSS_VFE1_GDSC>;
341
342       reg = <0x0ca00020 0x10>,
343         <0x0ca30000 0x100>,
344         <0x0ca30400 0x100>,
345         <0x0ca30800 0x100>,
346         <0x0ca30c00 0x100>,
347         <0x0c824000 0x1000>,
348         <0x0ca00120 0x4>,
349         <0x0c825000 0x1000>,
350         <0x0ca00124 0x4>,
351         <0x0c826000 0x1000>,
352         <0x0ca00128 0x4>,
353         <0x0ca31000 0x500>,
354         <0x0ca10000 0x1000>,
355         <0x0ca14000 0x1000>;
356
357       reg-names = "csi_clk_mux",
358         "csid0",
359         "csid1",
360         "csid2",
361         "csid3",
362         "csiphy0",
363         "csiphy0_clk_mux",
364         "csiphy1",
365         "csiphy1_clk_mux",
366         "csiphy2",
367         "csiphy2_clk_mux",
368         "ispif",
369         "vfe0",
370         "vfe1";
371
372       vdda-supply = <&reg_2v8>;
373
374       ports {
375         #address-cells = <1>;
376         #size-cells = <0>;
377       };
378     };