1 * Mediatek Video Processor Unit
3 Video Processor Unit is a HW video controller. It controls HW Codec including
4 H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
7 - compatible: "mediatek,mt8173-vpu"
8 - reg: Must contain an entry for each entry in reg-names.
9 - reg-names: Must include the following entries:
11 "cfg_reg": Main configuration registers base
12 - interrupts: interrupt number to the cpu.
13 - clocks : clock name from clock manager
14 - clock-names: must be main. It is the main clock of VPU
17 - memory-region: phandle to a node describing memory (see
18 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
19 to be used for VPU extended memory; if not present, VPU may be located
20 anywhere in the memory
24 compatible = "mediatek,mt8173-vpu";
25 reg = <0 0x10020000 0 0x30000>,
26 <0 0x10050000 0 0x100>;
27 reg-names = "tcm", "cfg_reg";
28 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
29 clocks = <&topckgen TOP_SCP_SEL>;