1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek JPEG Decoder
10 - Xia Jiang <xia.jiang@mediatek.com>
13 Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
20 - mediatek,mt8173-jpgdec
21 - mediatek,mt2701-jpgdec
24 - mediatek,mt7623-jpgdec
25 - mediatek,mt8188-jpgdec
26 - const: mediatek,mt2701-jpgdec
49 Points to the respective IOMMU block with master port as argument, see
50 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
51 Ports are according to the HW.
62 additionalProperties: false
66 #include <dt-bindings/clock/mt2701-clk.h>
67 #include <dt-bindings/interrupt-controller/arm-gic.h>
68 #include <dt-bindings/memory/mt2701-larb-port.h>
69 #include <dt-bindings/power/mt2701-power.h>
70 jpegdec: jpegdec@15004000 {
71 compatible = "mediatek,mt2701-jpgdec";
72 reg = <0x15004000 0x1000>;
73 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
74 clocks = <&imgsys CLK_IMG_JPGDEC_SMI>,
75 <&imgsys CLK_IMG_JPGDEC>;
76 clock-names = "jpgdec-smi",
78 power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
79 iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
80 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;