GNU Linux-libre 4.14.266-gnu1
[releases.git] / Documentation / devicetree / bindings / media / mediatek-jpeg-decoder.txt
1 * Mediatek JPEG Decoder
2
3 Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
4
5 Required properties:
6 - compatible : must be one of the following string:
7         "mediatek,mt8173-jpgdec"
8         "mediatek,mt2701-jpgdec"
9 - reg : physical base address of the jpeg decoder registers and length of
10   memory mapped region.
11 - interrupts : interrupt number to the interrupt controller.
12 - clocks: device clocks, see
13   Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: must contain "jpgdec-smi" and "jpgdec".
15 - power-domains: a phandle to the power domain, see
16   Documentation/devicetree/bindings/power/power_domain.txt for details.
17 - mediatek,larb: must contain the local arbiters in the current Socs, see
18   Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
19   for details.
20 - iommus: should point to the respective IOMMU block with master port as
21   argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
22   for details.
23
24 Example:
25         jpegdec: jpegdec@15004000 {
26                 compatible = "mediatek,mt2701-jpgdec";
27                 reg = <0 0x15004000 0 0x1000>;
28                 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
29                 clocks =  <&imgsys CLK_IMG_JPGDEC_SMI>,
30                           <&imgsys CLK_IMG_JPGDEC>;
31                 clock-names = "jpgdec-smi",
32                               "jpgdec";
33                 power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
34                 mediatek,larb = <&larb2>;
35                 iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
36                          <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
37         };