1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Resizer
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
14 One of Media Data Path 3 (MDP3) components used to do frame resizing.
20 - mediatek,mt8183-mdp3-rsz
25 mediatek,gce-client-reg:
26 $ref: /schemas/types.yaml#/definitions/phandle-array
29 - description: phandle of GCE
30 - description: GCE subsys id
31 - description: register offset
32 - description: register size
33 description: The register of client driver can be configured by gce with
34 4 arguments defined in this property. Each GCE subsys id is mapping to
35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
39 The event id which is mapping to the specific hardware event signal
40 to gce. The event id is defined in the gce header
41 include/dt-bindings/gce/<chip>-gce.h of each chips.
42 $ref: /schemas/types.yaml#/definitions/uint32-array
50 - mediatek,gce-client-reg
54 additionalProperties: false
58 #include <dt-bindings/clock/mt8183-clk.h>
59 #include <dt-bindings/gce/mt8183-gce.h>
61 mdp3_rsz0: mdp3-rsz0@14003000 {
62 compatible = "mediatek,mt8183-mdp3-rsz";
63 reg = <0x14003000 0x1000>;
64 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;
65 mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ0_SOF>,
66 <CMDQ_EVENT_MDP_RSZ0_EOF>;
67 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
70 mdp3_rsz1: mdp3-rsz1@14004000 {
71 compatible = "mediatek,mt8183-mdp3-rsz";
72 reg = <0x14004000 0x1000>;
73 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
74 mediatek,gce-events = <CMDQ_EVENT_MDP_RSZ1_SOF>,
75 <CMDQ_EVENT_MDP_RSZ1_EOF>;
76 clocks = <&mmsys CLK_MM_MDP_RSZ1>;