Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/i2c/aptina,mt9p031.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor
   8
   9 maintainers:
  10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11
  12 description: |
  13   The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor
  14   with an active array size of 2592H x 1944V. It is programmable through a
  15   simple two-wire serial interface.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - aptina,mt9p031
  21       - aptina,mt9p031m
  22
  23   reg:
  24     description: I2C device address
  25     maxItems: 1
  26
  27   clocks:
  28     maxItems: 1
  29
  30   vdd-supply:
  31     description: Digital supply voltage, 1.8 V
  32
  33   vdd_io-supply:
  34     description: I/O supply voltage, 1.8 or 2.8 V
  35
  36   vaa-supply:
  37     description: Analog supply voltage, 2.8 V
  38
  39   reset-gpios:
  40     maxItems: 1
  41     description: Chip reset GPIO
  42
  43   port:
  44     $ref: /schemas/graph.yaml#/$defs/port-base
  45     additionalProperties: false
  46
  47     properties:
  48       endpoint:
  49         $ref: /schemas/media/video-interfaces.yaml#
  50         unevaluatedProperties: false
  51
  52         properties:
  53           input-clock-frequency:
  54             $ref: /schemas/types.yaml#/definitions/uint32
  55             minimum: 6000000
  56             maximum: 96000000
  57             description: Input clock frequency
  58
  59           pixel-clock-frequency:
  60             $ref: /schemas/types.yaml#/definitions/uint32
  61             maximum: 96000000
  62             description: Target pixel clock frequency
  63
  64           pclk-sample:
  65             default: 0
  66
  67         required:
  68           - input-clock-frequency
  69           - pixel-clock-frequency
  70
  71 required:
  72   - compatible
  73   - reg
  74   - clocks
  75   - vdd-supply
  76   - vdd_io-supply
  77   - vaa-supply
  78   - port
  79
  80 additionalProperties: false
  81
  82 examples:
  83   - |
  84     i2c0 {
  85         #address-cells = <1>;
  86         #size-cells = <0>;
  87
  88         mt9p031@5d {
  89             compatible = "aptina,mt9p031";
  90             reg = <0x5d>;
  91             reset-gpios = <&gpio_sensor 0 0>;
  92
  93             clocks = <&sensor_clk>;
  94
  95             vdd-supply = <&reg_vdd>;
  96             vdd_io-supply = <&reg_vdd_io>;
  97             vaa-supply = <&reg_vaa>;
  98
  99             port {
 100                 mt9p031_1: endpoint {
 101                     input-clock-frequency = <6000000>;
 102                     pixel-clock-frequency = <96000000>;
 103                 };
 104             };
 105         };
 106     };
 107
 108 ...