Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/media/i2c/aptina,mt9p031.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Aptina 1/2.5-Inch 5Mp CMOS Digital Image Sensor
   8
   9 maintainers:
  10   - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  11
  12 description: |
  13   The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor
  14   with an active array size of 2592H x 1944V. It is programmable through a
  15   simple two-wire serial interface.
  16
  17 properties:
  18   compatible:
  19     enum:
  20       - aptina,mt9p006
  21       - aptina,mt9p031
  22       - aptina,mt9p031m
  23
  24   reg:
  25     description: I2C device address
  26     maxItems: 1
  27
  28   clocks:
  29     maxItems: 1
  30
  31   vdd-supply:
  32     description: Digital supply voltage, 1.8 V
  33
  34   vdd_io-supply:
  35     description: I/O supply voltage, 1.8 or 2.8 V
  36
  37   vaa-supply:
  38     description: Analog supply voltage, 2.8 V
  39
  40   reset-gpios:
  41     maxItems: 1
  42     description: Chip reset GPIO
  43
  44   port:
  45     $ref: /schemas/graph.yaml#/$defs/port-base
  46     additionalProperties: false
  47
  48     properties:
  49       endpoint:
  50         $ref: /schemas/media/video-interfaces.yaml#
  51         unevaluatedProperties: false
  52
  53         properties:
  54           input-clock-frequency:
  55             $ref: /schemas/types.yaml#/definitions/uint32
  56             minimum: 6000000
  57             maximum: 96000000
  58             description: Input clock frequency
  59
  60           pixel-clock-frequency:
  61             $ref: /schemas/types.yaml#/definitions/uint32
  62             maximum: 96000000
  63             description: Target pixel clock frequency
  64
  65           pclk-sample:
  66             default: 0
  67
  68         required:
  69           - input-clock-frequency
  70           - pixel-clock-frequency
  71
  72 required:
  73   - compatible
  74   - reg
  75   - clocks
  76   - vdd-supply
  77   - vdd_io-supply
  78   - vaa-supply
  79   - port
  80
  81 additionalProperties: false
  82
  83 examples:
  84   - |
  85     i2c0 {
  86         #address-cells = <1>;
  87         #size-cells = <0>;
  88
  89         mt9p031@5d {
  90             compatible = "aptina,mt9p031";
  91             reg = <0x5d>;
  92             reset-gpios = <&gpio_sensor 0 0>;
  93
  94             clocks = <&sensor_clk>;
  95
  96             vdd-supply = <&reg_vdd>;
  97             vdd_io-supply = <&reg_vdd_io>;
  98             vaa-supply = <&reg_vaa>;
  99
 100             port {
 101                 mt9p031_1: endpoint {
 102                     input-clock-frequency = <6000000>;
 103                     pixel-clock-frequency = <96000000>;
 104                 };
 105             };
 106         };
 107     };
 108
 109 ...