1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner H3 Deinterlace
10 - Jernej Skrabec <jernej.skrabec@siol.net>
11 - Chen-Yu Tsai <wens@csie.org>
12 - Maxime Ripard <mripard@kernel.org>
15 The Allwinner H3 and later has a deinterlace core used for
16 deinterlacing interlaced video content.
21 - const: allwinner,sun8i-h3-deinterlace
23 - const: allwinner,sun8i-r40-deinterlace
24 - const: allwinner,sun8i-h3-deinterlace
26 - const: allwinner,sun50i-a64-deinterlace
27 - const: allwinner,sun8i-h3-deinterlace
37 - description: Deinterlace interface clock
38 - description: Deinterlace module clock
39 - description: Deinterlace DRAM clock
62 additionalProperties: false
66 #include <dt-bindings/interrupt-controller/arm-gic.h>
67 #include <dt-bindings/clock/sun8i-h3-ccu.h>
68 #include <dt-bindings/reset/sun8i-h3-ccu.h>
70 deinterlace: deinterlace@1400000 {
71 compatible = "allwinner,sun8i-h3-deinterlace";
72 reg = <0x01400000 0x20000>;
73 clocks = <&ccu CLK_BUS_DEINTERLACE>,
74 <&ccu CLK_DEINTERLACE>,
75 <&ccu CLK_DRAM_DEINTERLACE>;
76 clock-names = "bus", "mod", "ram";
77 resets = <&ccu RST_BUS_DEINTERLACE>;
78 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
79 interconnects = <&mbus 9>;
80 interconnect-names = "dma-mem";