Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 # Copyright (C) Sunplus Co., Ltd. 2021
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: Sunplus SP7021 SoC Interrupt Controller
   9
  10 maintainers:
  11   - Qin Jian <qinjian@cqplus1.com>
  12
  13 properties:
  14   compatible:
  15     items:
  16       - const: sunplus,sp7021-intc
  17
  18   reg:
  19     maxItems: 2
  20     description:
  21       Specifies base physical address(s) and size of the controller regs.
  22       The 1st region include type/polarity/priority/mask regs.
  23       The 2nd region include clear/masked_ext0/masked_ext1/group regs.
  24
  25   interrupt-controller: true
  26
  27   "#interrupt-cells":
  28     const: 2
  29     description:
  30       The first cell is the IRQ number, the second cell is the trigger
  31       type as defined in interrupt.txt in this directory.
  32
  33   interrupts:
  34     maxItems: 2
  35     description:
  36       EXT_INT0 & EXT_INT1, 2 interrupts references to primary interrupt
  37       controller.
  38
  39 required:
  40   - compatible
  41   - reg
  42   - interrupt-controller
  43   - "#interrupt-cells"
  44   - interrupts
  45
  46 additionalProperties: false
  47
  48 examples:
  49   - |
  50     #include <dt-bindings/interrupt-controller/arm-gic.h>
  51
  52     intc: interrupt-controller@9c000780 {
  53         compatible = "sunplus,sp7021-intc";
  54         reg = <0x9c000780 0x80>, <0x9c000a80 0x80>;
  55         interrupt-controller;
  56         #interrupt-cells = <2>;
  57         interrupt-parent = <&gic>;
  58         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, /* EXT_INT0 */
  59                      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; /* EXT_INT1 */
  60     };
  61
  62 ...