1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL SoC interrupt controller devicetree bindings
10 Interrupt controller and router for Realtek MIPS SoCs, allowing each SoC
11 interrupt to be routed to one parent CPU (hardware) interrupt, or left
13 All connected input lines from SoC peripherals can be masked individually,
14 and an interrupt status register is present to indicate which interrupts are
18 - Birger Koblitz <mail@birger-koblitz.de>
19 - Bert Vermeulen <bert@biot.com>
20 - John Crispin <john@phrozen.org>
27 - realtek,rtl8380-intc
28 - const: realtek,rtl-intc
29 - const: realtek,rtl-intc
34 SoC interrupt line index.
44 List of parent interrupts, in the order that they are connected to this
45 interrupt router's outputs, starting at the first output.
47 interrupt-controller: true
51 description: Describes mapping from SoC interrupts to CPU interrupts
57 - interrupt-controller
63 const: realtek,rtl-intc
75 additionalProperties: false
79 interrupt-controller@3000 {
80 compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";
81 #interrupt-cells = <1>;
85 interrupt-parent = <&cpuintc>;
86 interrupts = <2>, <3>, <4>, <5>, <6>;