1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Layerscape External Interrupt Controller
10 - Shawn Guo <shawnguo@kernel.org>
11 - Li Yang <leoyang.li@nxp.com>
14 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
15 LX216xA) support inverting the polarity of certain external interrupt
28 - const: fsl,ls1043a-extirq
33 - const: fsl,ls1088a-extirq
41 interrupt-controller: true
46 Specifies the Interrupt Polarity Control Register (INTPCR) in the
47 SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
50 description: Specifies the mapping from external interrupts to GIC interrupts.
52 interrupt-map-mask: true
58 - interrupt-controller
99 additionalProperties: false
103 #include <dt-bindings/interrupt-controller/arm-gic.h>
104 interrupt-controller@1ac {
105 compatible = "fsl,ls1021a-extirq";
106 #interrupt-cells = <2>;
107 #address-cells = <0>;
108 interrupt-controller;
111 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
112 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
113 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
114 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
115 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
116 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
117 interrupt-map-mask = <0x7 0x0>;