1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple Interrupt Controller 2
10 - Hector Martin <marcan@marcan.st>
13 The Apple Interrupt Controller 2 is a simple interrupt controller present on
14 Apple ARM SoC platforms starting with t600x (M1 Pro and Max).
16 It provides the following features:
18 - Level-triggered hardware IRQs wired to SoC blocks
19 - Single mask bit per IRQ
20 - Automatic masking on event delivery (auto-ack)
21 - Software triggering (ORed with hw line)
22 - Automatic prioritization (single event/ack register per CPU, lower IRQs =
24 - Automatic masking on ack
25 - Support for multiple dies
27 This device also represents the FIQ interrupt sources on platforms using AIC,
28 which do not go through a discrete interrupt controller. It also handles
34 - const: apple,t6000-aic
37 interrupt-controller: true
42 The 1st cell contains the interrupt type:
46 The 2nd cell contains the die ID.
48 The next cell contains the interrupt number.
49 - HW IRQs: interrupt number
51 - 0: physical HV timer
53 - 2: physical guest timer
54 - 3: virtual guest timer
56 The last cell contains the interrupt flags. This is normally
57 IRQ_TYPE_LEVEL_HIGH (4).
61 - description: Address and size of the main AIC2 registers.
62 - description: Address and size of the AIC2 Event register.
75 - interrupt-controller
79 additionalProperties: false
82 - $ref: /schemas/interrupt-controller.yaml#
90 aic: interrupt-controller@28e100000 {
91 compatible = "apple,t6000-aic", "apple,aic2";
92 #interrupt-cells = <4>;
94 reg = <0x2 0x8e100000 0x0 0xc000>,
95 <0x2 0x8e10c000 0x0 0x4>;
96 reg-names = "core", "event";