1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCM2290 Network-On-Chip interconnect
10 - Shawn Guo <shawn.guo@linaro.org>
13 The Qualcomm QCM2290 interconnect providers support adjusting the
14 bandwidth requirements between the various NoC fabrics.
26 '#interconnect-cells':
36 - description: Bus Clock
37 - description: Bus A Clock
39 # Child node's properties
41 '^interconnect-[a-z0-9]+$':
44 The interconnect providers do not have a separate QoS register space,
45 but share parent's space.
50 - qcom,qcm2290-qup-virt
51 - qcom,qcm2290-mmrt-virt
52 - qcom,qcm2290-mmnrt-virt
54 '#interconnect-cells':
64 - description: Bus Clock
65 - description: Bus A Clock
69 - '#interconnect-cells'
73 additionalProperties: false
78 - '#interconnect-cells'
82 additionalProperties: false
86 #include <dt-bindings/clock/qcom,rpmcc.h>
88 snoc: interconnect@1880000 {
89 compatible = "qcom,qcm2290-snoc";
90 reg = <0x01880000 0x60200>;
91 #interconnect-cells = <1>;
92 clock-names = "bus", "bus_a";
93 clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
94 <&rpmcc RPM_SMD_SNOC_A_CLK>;
96 qup_virt: interconnect-qup {
97 compatible = "qcom,qcm2290-qup-virt";
98 #interconnect-cells = <1>;
99 clock-names = "bus", "bus_a";
100 clocks = <&rpmcc RPM_SMD_QUP_CLK>,
101 <&rpmcc RPM_SMD_QUP_A_CLK>;
104 mmnrt_virt: interconnect-mmnrt {
105 compatible = "qcom,qcm2290-mmnrt-virt";
106 #interconnect-cells = <1>;
107 clock-names = "bus", "bus_a";
108 clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
109 <&rpmcc RPM_SMD_MMNRT_A_CLK>;
112 mmrt_virt: interconnect-mmrt {
113 compatible = "qcom,qcm2290-mmrt-virt";
114 #interconnect-cells = <1>;
115 clock-names = "bus", "bus_a";
116 clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
117 <&rpmcc RPM_SMD_MMRT_A_CLK>;
121 cnoc: interconnect@1900000 {
122 compatible = "qcom,qcm2290-cnoc";
123 reg = <0x01900000 0x8200>;
124 #interconnect-cells = <1>;
125 clock-names = "bus", "bus_a";
126 clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
127 <&rpmcc RPM_SMD_CNOC_A_CLK>;
130 bimc: interconnect@4480000 {
131 compatible = "qcom,qcm2290-bimc";
132 reg = <0x04480000 0x80000>;
133 #interconnect-cells = <1>;
134 clock-names = "bus", "bus_a";
135 clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
136 <&rpmcc RPM_SMD_BIMC_A_CLK>;