1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.
14 The OSM L3 interconnect provider aggregates the L3 bandwidth requests
15 from CPU/GPU and relays it to the OSM.
32 - description: xo clock
33 - description: alternate clock
40 '#interconnect-cells':
48 - '#interconnect-cells'
50 additionalProperties: false
56 #define RPMH_CXO_CLK 0
58 osm_l3: interconnect@17d41000 {
59 compatible = "qcom,sdm845-osm-l3";
60 reg = <0x17d41000 0x1400>;
62 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
63 clock-names = "xo", "alternate";
65 #interconnect-cells = <1>;