1 STMicroelectronics STM32 DFSDM ADC device driver
4 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
5 interface external sigma delta modulators to STM32 micro controllers.
6 It is mainly targeted for:
7 - Sigma delta modulators (motor control, metering...)
8 - PDM microphones (audio digital microphone)
10 It features up to 8 serial digital interfaces (SPI or Manchester) and
11 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
13 Each child node match with a filter instance.
15 Contents of a STM32 DFSDM root node:
16 ------------------------------------
18 - compatible: Should be one of:
21 - reg: Offset and length of the DFSDM block register set.
22 - clocks: IP and serial interfaces clocking. Should be set according
23 to rcc clock ID and "clock-names".
24 - clock-names: Input clock name "dfsdm" must be defined,
25 "audio" is optional. If defined CLKOUT is based on the audio
26 clock, else "dfsdm" is used.
27 - #interrupt-cells = <1>;
28 - #address-cells = <1>;
32 - spi-max-frequency: Requested only for SPI master mode.
33 SPI clock OUT frequency (Hz). This clock must be set according
34 to "clock" property. Frequency must be a multiple of the rcc
35 clock frequency. If not, SPI CLKOUT frequency will not be
37 - pinctrl-names: Set to "default".
38 - pinctrl-0: List of phandles pointing to pin configuration
39 nodes to set pins in mode of operation for dfsdm
42 Contents of a STM32 DFSDM child nodes:
43 --------------------------------------
46 - compatible: Must be:
47 "st,stm32-dfsdm-adc" for sigma delta ADCs
48 "st,stm32-dfsdm-dmic" for audio digital microphone.
49 - reg: Specifies the DFSDM filter instance used.
50 Valid values are from 0 to 3 on stm32h7, 0 to 5 on stm32mp1.
51 - interrupts: IRQ lines connected to each DFSDM filter instance.
52 - st,adc-channels: List of single-ended channels muxed for this ADC.
54 "st,stm32h7-dfsdm" compatibility: 0 to 7.
55 - st,adc-channel-names: List of single-ended channel names.
56 - st,filter-order: SinC filter order from 0 to 5.
59 For audio purpose it is recommended to use order 3 to 5.
60 - #io-channel-cells = <1>: See the IIO bindings section "IIO consumers".
62 Required properties for "st,stm32-dfsdm-adc" compatibility:
63 - io-channels: From common IIO binding. Used to pipe external sigma delta
64 modulator or internal ADC output to DFSDM channel.
65 This is not required for "st,stm32-dfsdm-pdm" compatibility as
66 PDM microphone is binded in Audio DT node.
68 Required properties for "st,stm32-dfsdm-pdm" compatibility:
69 - #sound-dai-cells: Must be set to 0.
70 - dma: DMA controller phandle and DMA request line associated to the
71 filter instance (specified by the field "reg")
72 - dma-names: Must be "rx"
75 - st,adc-channel-types: Single-ended channel input type.
76 - "SPI_R": SPI with data on rising edge (default)
77 - "SPI_F": SPI with data on falling edge
78 - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
79 - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
80 - st,adc-channel-clk-src: Conversion clock source.
81 - "CLKIN": external SPI clock (CLKIN x)
82 - "CLKOUT": internal SPI clock (CLKOUT) (default)
83 - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
84 - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
86 - st,adc-alt-channel: Must be defined if two sigma delta modulator are
87 connected on same SPI input.
88 If not set, channel n is connected to SPI input n.
89 If set, channel n is connected to SPI input n + 1.
91 - st,filter0-sync: Set to 1 to synchronize with DFSDM filter instance 0.
92 Used for multi microphones synchronization.
94 Example of a sigma delta adc connected on DFSDM SPI port 0
95 and a pdm microphone connected on DFSDM SPI port 1:
97 ads1202: simple_sd_adc@0 {
98 compatible = "ads1202";
99 #io-channel-cells = <1>;
102 dfsdm: dfsdm@40017000 {
103 compatible = "st,stm32h7-dfsdm";
104 reg = <0x40017000 0x400>;
105 clocks = <&rcc DFSDM1_CK>;
106 clock-names = "dfsdm";
107 #interrupt-cells = <1>;
108 #address-cells = <1>;
111 dfsdm_adc0: filter@0 {
112 compatible = "st,stm32-dfsdm-adc";
113 #io-channel-cells = <1>;
116 st,adc-channels = <0>;
117 st,adc-channel-names = "sd_adc0";
118 st,adc-channel-types = "SPI_F";
119 st,adc-channel-clk-src = "CLKOUT";
120 io-channels = <&ads1202 0>;
121 st,filter-order = <3>;
123 dfsdm_pdm1: filter@1 {
124 compatible = "st,stm32-dfsdm-dmic";
127 dmas = <&dmamux1 102 0x400 0x00>;
129 st,adc-channels = <1>;
130 st,adc-channel-names = "dmic1";
131 st,adc-channel-types = "SPI_R";
132 st,adc-channel-clk-src = "CLKOUT";
133 st,filter-order = <5>;