1 Qualcomm Universal Peripheral (QUP) I2C controller
4 - compatible: Should be:
5 * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064.
6 * "qcom,i2c-qup-v2.1.1" for 8974 v1.
7 * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later.
8 - reg: Should contain QUP register address and length.
9 - interrupts: Should contain I2C interrupt.
11 - clocks: A list of phandles + clock-specifiers, one for each entry in
13 - clock-names: Should contain:
14 * "core" for the core clock
15 * "iface" for the AHB clock
17 - #address-cells: Should be <1> Address cells for i2c device address
18 - #size-cells: Should be <0> as i2c addresses have no size component
21 - clock-frequency: Should specify the desired i2c bus clock frequency in Hz,
22 defaults to 100kHz if omitted.
24 Child nodes should conform to i2c bus binding.
29 compatible = "qcom,i2c-qup-v2.2.1";
30 reg = <0xf9924000 0x1000>;
31 interrupts = <0 96 0>;
33 clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
34 clock-names = "core", "iface";
36 clock-frequency = <355000>;