Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Microchip MPFS I2C Controller
   8
   9 maintainers:
  10   - Daire McNamara <daire.mcnamara@microchip.com>
  11
  12 allOf:
  13   - $ref: /schemas/i2c/i2c-controller.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - items:
  19           - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
  20           - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
  21       - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core
  22
  23   reg:
  24     maxItems: 1
  25
  26   interrupts:
  27     maxItems: 1
  28
  29   clocks:
  30     maxItems: 1
  31
  32   clock-frequency:
  33     description: |
  34       Desired I2C bus clock frequency in Hz. As only Standard and Fast
  35       modes are supported, possible values are 100000 and 400000.
  36     enum: [100000, 400000]
  37
  38 required:
  39   - compatible
  40   - reg
  41   - interrupts
  42   - clocks
  43
  44 unevaluatedProperties: false
  45
  46 examples:
  47   - |
  48     i2c@2010a000 {
  49       compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7";
  50       reg = <0x2010a000 0x1000>;
  51       clocks = <&clkcfg 15>;
  52       interrupt-parent = <&plic>;
  53       interrupts = <58>;
  54       clock-frequency = <100000>;
  55     };
  56 ...