1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MV64XXX I2C Controller
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
15 - const: allwinner,sun4i-a10-i2c
17 - const: allwinner,sun7i-a20-i2c
18 - const: allwinner,sun4i-a10-i2c
19 - const: allwinner,sun6i-a31-i2c
22 - allwinner,sun8i-a23-i2c
23 - allwinner,sun8i-a83t-i2c
24 - allwinner,sun8i-v536-i2c
25 - allwinner,sun50i-a64-i2c
26 - allwinner,sun50i-h6-i2c
27 - const: allwinner,sun6i-a31-i2c
28 - description: Allwinner SoCs with offload support
31 - allwinner,sun20i-d1-i2c
32 - allwinner,sun50i-a100-i2c
33 - allwinner,sun50i-h616-i2c
34 - allwinner,sun50i-r329-i2c
35 - const: allwinner,sun8i-v536-i2c
36 - const: allwinner,sun6i-a31-i2c
37 - const: marvell,mv64xxx-i2c
38 - const: marvell,mv78230-i2c
39 - const: marvell,mv78230-a0-i2c
42 Only use "marvell,mv78230-a0-i2c" for a very rare, initial
43 version of the SoC which had broken offload support. Linux
44 auto-detects this and sets it appropriately.
55 - description: Reference clock for the I2C bus
56 - description: Bus clock (Only for Armada 7K/8K)
64 Mandatory if two clocks are used (only for Armada 7k and 8k).
71 - description: RX DMA Channel
72 - description: TX DMA Channel
88 - $ref: /schemas/i2c/i2c-controller.yaml#
94 - allwinner,sun4i-a10-i2c
95 - allwinner,sun6i-a31-i2c
105 const: allwinner,sun6i-a31-i2c
111 unevaluatedProperties: false
116 compatible = "marvell,mv64xxx-i2c";
117 reg = <0x11000 0x20>;
119 clock-frequency = <100000>;
124 compatible = "marvell,mv78230-i2c";
125 reg = <0x11000 0x100>;
127 clock-frequency = <100000>;
132 compatible = "marvell,mv78230-i2c";
133 reg = <0x701000 0x20>;
135 clock-frequency = <100000>;
136 clock-names = "core", "reg";
137 clocks = <&core_clock>, <®_clock>;