Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/i2c/i2c-imx-lpi2c.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Freescale Low Power Inter IC (LPI2C) for i.MX
   8
   9 maintainers:
  10   - Anson Huang <Anson.Huang@nxp.com>
  11
  12 allOf:
  13   - $ref: /schemas/i2c/i2c-controller.yaml#
  14
  15 properties:
  16   compatible:
  17     oneOf:
  18       - enum:
  19           - fsl,imx7ulp-lpi2c
  20       - items:
  21           - enum:
  22               - fsl,imx8qxp-lpi2c
  23               - fsl,imx8dxl-lpi2c
  24               - fsl,imx8qm-lpi2c
  25               - fsl,imx8ulp-lpi2c
  26               - fsl,imx93-lpi2c
  27           - const: fsl,imx7ulp-lpi2c
  28
  29   reg:
  30     maxItems: 1
  31
  32   interrupts:
  33     maxItems: 1
  34
  35   assigned-clock-parents: true
  36   assigned-clock-rates: true
  37   assigned-clocks: true
  38   clock-frequency: true
  39
  40   clock-names:
  41     items:
  42       - const: per
  43       - const: ipg
  44
  45   clocks:
  46     maxItems: 2
  47
  48   dmas:
  49     items:
  50       - description: DMA controller phandle and request line for TX
  51       - description: DMA controller phandle and request line for RX
  52
  53   dma-names:
  54     items:
  55       - const: tx
  56       - const: rx
  57
  58   power-domains:
  59     maxItems: 1
  60
  61 required:
  62   - compatible
  63   - reg
  64   - interrupts
  65   - clocks
  66
  67 unevaluatedProperties: false
  68
  69 examples:
  70   - |
  71     #include <dt-bindings/clock/imx7ulp-clock.h>
  72     #include <dt-bindings/interrupt-controller/arm-gic.h>
  73
  74     i2c@40a50000 {
  75         compatible = "fsl,imx7ulp-lpi2c";
  76         reg = <0x40A50000 0x10000>;
  77         interrupt-parent = <&intc>;
  78         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  79         clocks = <&clks IMX7ULP_CLK_LPI2C7>,
  80                  <&clks IMX7ULP_CLK_NIC1_BUS_DIV>;
  81     };