1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier GPIO controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
27 interrupt-controller: true
31 The first cell defines the interrupt number.
32 The second cell bits[3:0] is used to specify trigger type as follows:
33 1 = low-to-high edge triggered
34 2 = high-to-low edge triggered
35 4 = active high level-sensitive
36 8 = active low level-sensitive
37 Valid combinations are 1, 2, 3, 4, 8.
46 gpio-ranges-group-names: true
48 socionext,interrupt-ranges:
50 Specifies an interrupt number mapping between this GPIO controller and
51 its interrupt parent, in the form of arbitrary number of
52 <child-interrupt-base parent-interrupt-base length> triplets.
53 $ref: /schemas/types.yaml#/definitions/uint32-matrix
70 additionalProperties: false
77 - interrupt-controller
81 - socionext,interrupt-ranges
83 additionalProperties: false
87 #include <dt-bindings/gpio/gpio.h>
88 #include <dt-bindings/gpio/uniphier-gpio.h>
91 compatible = "socionext,uniphier-gpio";
92 reg = <0x55000000 0x200>;
93 interrupt-parent = <&aidet>;
95 #interrupt-cells = <2>;
98 gpio-ranges = <&pinctrl 0 0 0>;
99 gpio-ranges-group-names = "gpio_range";
101 socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;
105 // Please note UNIPHIER_GPIO_PORT(29, 4) represents PORT294 in the SoC
106 // document. Unfortunately, only the one's place is octal in the port
107 // numbering. (That is, PORT 8, 9, 18, 19, 28, 29, ... do not exist.)
108 // UNIPHIER_GPIO_PORT() is a helper macro to calculate 29 * 8 + 4.
110 compatible = "mmc-pwrseq-emmc";
111 reset-gpios = <&gpio UNIPHIER_GPIO_PORT(29, 4) GPIO_ACTIVE_LOW>;