Documentation/devicetree/bindings/fpga/altr,freeze-bridge-controller.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/fpga/altr,freeze-bridge-controller.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Altera Freeze Bridge Controller
   8
   9 description:
  10   The Altera Freeze Bridge Controller manages one or more freeze bridges.
  11   The controller can freeze/disable the bridges which prevents signal
  12   changes from passing through the bridge. The controller can also
  13   unfreeze/enable the bridges which allows traffic to pass through the bridge
  14   normally.
  15
  16 maintainers:
  17   - Xu Yilun <yilun.xu@intel.com>
  18
  19 allOf:
  20   - $ref: fpga-bridge.yaml#
  21
  22 properties:
  23   compatible:
  24     const: altr,freeze-bridge-controller
  25
  26   reg:
  27     maxItems: 1
  28
  29 required:
  30   - compatible
  31   - reg
  32
  33 unevaluatedProperties: false
  34
  35 examples:
  36   - |
  37     fpga-bridge@100000450 {
  38         compatible = "altr,freeze-bridge-controller";
  39         reg = <0x1000 0x10>;
  40         bridge-enable = <0>;
  41     };