Documentation/devicetree/bindings/firmware/qcom,scm.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: QCOM Secure Channel Manager (SCM)
   8
   9 description: |
  10   Qualcomm processors include an interface to communicate to the secure firmware.
  11   This interface allows for clients to request different types of actions.
  12   These can include CPU power up/down, HDCP requests, loading of firmware,
  13   and other assorted actions.
  14
  15 maintainers:
  16   - Bjorn Andersson <bjorn.andersson@linaro.org>
  17   - Robert Marko <robimarko@gmail.com>
  18   - Guru Das Srinagesh <quic_gurus@quicinc.com>
  19
  20 properties:
  21   compatible:
  22     items:
  23       - enum:
  24           - qcom,scm-apq8064
  25           - qcom,scm-apq8084
  26           - qcom,scm-ipq4019
  27           - qcom,scm-ipq6018
  28           - qcom,scm-ipq806x
  29           - qcom,scm-ipq8074
  30           - qcom,scm-mdm9607
  31           - qcom,scm-msm8226
  32           - qcom,scm-msm8660
  33           - qcom,scm-msm8916
  34           - qcom,scm-msm8953
  35           - qcom,scm-msm8960
  36           - qcom,scm-msm8974
  37           - qcom,scm-msm8976
  38           - qcom,scm-msm8994
  39           - qcom,scm-msm8996
  40           - qcom,scm-msm8998
  41           - qcom,scm-sc7180
  42           - qcom,scm-sc7280
  43           - qcom,scm-sc8280xp
  44           - qcom,scm-sdm845
  45           - qcom,scm-sdx55
  46           - qcom,scm-sdx65
  47           - qcom,scm-sm6115
  48           - qcom,scm-sm6125
  49           - qcom,scm-sm6350
  50           - qcom,scm-sm8150
  51           - qcom,scm-sm8250
  52           - qcom,scm-sm8350
  53           - qcom,scm-sm8450
  54           - qcom,scm-qcs404
  55       - const: qcom,scm
  56
  57   clocks:
  58     minItems: 1
  59     maxItems: 3
  60
  61   clock-names:
  62     minItems: 1
  63     maxItems: 3
  64
  65   interconnects:
  66     maxItems: 1
  67
  68   interconnect-names:
  69     maxItems: 1
  70
  71   '#reset-cells':
  72     const: 1
  73
  74   qcom,dload-mode:
  75     $ref: /schemas/types.yaml#/definitions/phandle-array
  76     items:
  77       - items:
  78           - description: phandle to TCSR hardware block
  79           - description: offset of the download mode control register
  80     description: TCSR hardware block
  81
  82 allOf:
  83   - if:
  84       properties:
  85         compatible:
  86           contains:
  87             enum:
  88               - qcom,scm-apq8064
  89               - qcom,scm-msm8660
  90               - qcom,scm-msm8960
  91     then:
  92       properties:
  93         clock-names:
  94           items:
  95             - const: core
  96
  97         clocks:
  98           maxItems: 1
  99
 100       required:
 101         - clocks
 102         - clock-names
 103
 104   - if:
 105       properties:
 106         compatible:
 107           contains:
 108             enum:
 109               - qcom,scm-apq8084
 110               - qcom,scm-mdm9607
 111               - qcom,scm-msm8916
 112               - qcom,scm-msm8953
 113               - qcom,scm-msm8974
 114               - qcom,scm-msm8976
 115     then:
 116       properties:
 117         clock-names:
 118           items:
 119             - const: core
 120             - const: bus
 121             - const: iface
 122
 123         clocks:
 124           minItems: 3
 125           maxItems: 3
 126
 127       required:
 128         - clocks
 129         - clock-names
 130
 131 required:
 132   - compatible
 133
 134 additionalProperties: false
 135
 136 examples:
 137   - |
 138     #include <dt-bindings/clock/qcom,gcc-msm8916.h>
 139
 140     firmware {
 141         scm {
 142             compatible = "qcom,scm-msm8916", "qcom,scm";
 143             clocks = <&gcc GCC_CRYPTO_CLK>,
 144                      <&gcc GCC_CRYPTO_AXI_CLK>,
 145                      <&gcc GCC_CRYPTO_AHB_CLK>;
 146             clock-names = "core", "bus", "iface";
 147         };
 148     };