1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX System Controller Firmware (SCFW)
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
15 resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
16 (QM, QP), and i.MX8QX (QXP, DX).
17 The AP communicates with the SC using a multi-ported MU module found
18 in the LSIO subsystem. The current definition of this MU module provides
19 5 remote AP connections to the SC to support up to 5 execution environments
20 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
21 with the LSIO DSC IP bus. The SC firmware will communicate with this MU
30 Clock controller node that provides the clocks controlled by the SCU
31 $ref: /schemas/clock/fsl,scu-clk.yaml
35 Control the GPIO PINs on SCU domain over the firmware APIs
36 $ref: /schemas/gpio/fsl,imx8qxp-sc-gpio.yaml
40 OCOTP controller node provided by the SCU
41 $ref: /schemas/nvmem/fsl,scu-ocotp.yaml
45 Keys provided by the SCU
46 $ref: /schemas/input/fsl,scu-key.yaml
50 A list of phandles of TX MU channels followed by a list of phandles of
51 RX MU channels. The list may include at the end one more optional MU
52 channel for general interrupt. The number of expected tx and rx
53 channels is 1 TX and 1 RX channels if MU instance is "fsl,imx8-mu-scu"
54 compatible, 4 TX and 4 RX channels otherwise. All MU channels must be
55 within the same MU instance. Cross instances are not allowed. The MU
56 instance can only be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users
57 need to ensure that one is used that does not conflict with other
58 execution environments such as ATF.
61 - description: TX0 MU channel
62 - description: RX0 MU channel
64 - description: TX0 MU channel
65 - description: RX0 MU channel
66 - description: optional MU channel for general interrupt
68 - description: TX0 MU channel
69 - description: TX1 MU channel
70 - description: TX2 MU channel
71 - description: TX3 MU channel
72 - description: RX0 MU channel
73 - description: RX1 MU channel
74 - description: RX2 MU channel
75 - description: RX3 MU channel
77 - description: TX0 MU channel
78 - description: TX1 MU channel
79 - description: TX2 MU channel
80 - description: TX3 MU channel
81 - description: RX0 MU channel
82 - description: RX1 MU channel
83 - description: RX2 MU channel
84 - description: RX3 MU channel
85 - description: optional MU channel for general interrupt
118 Pin controller provided by the SCU
119 $ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml
123 Power domains controller node that provides the power domains
124 controlled by the SCU
125 $ref: /schemas/power/fsl,scu-pd.yaml
129 RTC controller provided by the SCU
130 $ref: /schemas/rtc/fsl,scu-rtc.yaml
134 Thermal sensor provided by the SCU
135 $ref: /schemas/thermal/fsl,scu-thermal.yaml
139 Watchdog controller provided by the SCU
140 $ref: /schemas/watchdog/fsl,scu-wdt.yaml
147 additionalProperties: false
151 #include <dt-bindings/firmware/imx/rsrc.h>
152 #include <dt-bindings/input/input.h>
153 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
157 compatible = "fsl,imx-scu";
158 mbox-names = "tx0", "tx1", "tx2", "tx3",
159 "rx0", "rx1", "rx2", "rx3",
161 mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3
162 &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3
166 compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
171 compatible = "fsl,imx8qxp-iomuxc";
173 pinctrl_lpuart0: lpuart0grp {
175 IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020
176 IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020
182 compatible = "fsl,imx8qxp-scu-ocotp";
183 #address-cells = <1>;
192 compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
193 #power-domain-cells = <1>;
197 compatible = "fsl,imx8qxp-sc-rtc";
201 compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
202 linux,keycodes = <KEY_POWER>;
206 compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
211 compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
212 #thermal-sensor-cells = <1>;