1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2021 ARM Ltd.
5 $id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: System Control and Management Interface (SCMI) Message Protocol bindings
11 - Sudeep Holla <sudeep.holla@arm.com>
14 The SCMI is intended to allow agents such as OSPM to manage various functions
15 that are provided by the hardware platform it is running on, including power
16 and performance functions.
18 This binding is intended to define the interface the firmware implementing
19 the SCMI as described in ARM document number ARM DEN 0056 ("ARM System Control
20 and Management Interface Platform Design Document")[0] provide for OSPM in
23 [0] https://developer.arm.com/documentation/den0056/latest
31 - description: SCMI compliant firmware with mailbox transport
34 - description: SCMI compliant firmware with ARM SMC/HVC transport
37 - description: SCMI compliant firmware with SCMI Virtio transport.
38 The virtio transport only supports a single device.
40 - const: arm,scmi-virtio
41 - description: SCMI compliant firmware with OP-TEE transport
43 - const: linaro,scmi-optee
47 The interrupt that indicates message completion by the platform
48 rather than by the return of the smc call. This should not be used
49 except when the platform requires such behavior.
57 Specifies the mailboxes used to communicate with SCMI compliant
65 List of phandle and mailbox channel specifiers. It should contain
66 exactly one or two mailboxes, one for transmitting messages("tx")
67 and another optional for receiving the notifications("rx") if supported.
73 List of phandle pointing to the shared memory(SHM) area, for each
74 transport channel specified.
86 An optional time value, expressed in microseconds, representing, on this
87 platform, the threshold above which any SCMI command, advertised to have
88 an higher-than-threshold execution latency, should not be considered for
89 atomic mode of operation, even if requested.
93 $ref: /schemas/types.yaml#/definitions/uint32
95 SMC id required when using smc or hvc transports
97 linaro,optee-channel-id:
98 $ref: /schemas/types.yaml#/definitions/uint32
100 Channel specifier required when using OP-TEE transport.
108 '#power-domain-cells':
112 - '#power-domain-cells'
144 '#thermal-sensor-cells':
148 - '#thermal-sensor-cells'
171 The list of all regulators provided by this SCMI controller.
174 '^regulators@[0-9a-f]+$':
176 $ref: "../regulator/regulator.yaml#"
181 description: Identifier for the voltage regulator.
186 additionalProperties: false
189 '^protocol@[0-9a-f]+$':
192 Each sub-node represents a protocol supported. If the platform
193 supports a dedicated communication channel for a particular protocol,
194 then the corresponding transport properties must be present.
195 The virtio transport does not support a dedicated communication channel.
214 linaro,optee-channel-id:
215 $ref: /schemas/types.yaml#/definitions/uint32
217 Channel specifier required when using OP-TEE transport and
218 protocol has a dedicated communication channel.
234 interrupt-names: false
256 const: linaro,scmi-optee
259 - linaro,optee-channel-id
265 compatible = "arm,scmi";
266 mboxes = <&mhuB 0 0>,
268 mbox-names = "tx", "rx";
269 shmem = <&cpu_scp_lpri0>,
272 #address-cells = <1>;
275 atomic-threshold-us = <10000>;
277 scmi_devpd: protocol@11 {
279 #power-domain-cells = <1>;
282 scmi_dvfs: protocol@13 {
286 mboxes = <&mhuB 1 0>,
288 mbox-names = "tx", "rx";
289 shmem = <&cpu_scp_hpri0>,
293 scmi_clk: protocol@14 {
298 scmi_sensors: protocol@15 {
300 #thermal-sensor-cells = <1>;
303 scmi_reset: protocol@16 {
308 scmi_voltage: protocol@17 {
311 #address-cells = <1>;
314 regulator_devX: regulator@0 {
316 regulator-max-microvolt = <3300000>;
319 regulator_devY: regulator@9 {
321 regulator-min-microvolt = <500000>;
322 regulator-max-microvolt = <4200000>;
330 #address-cells = <2>;
334 compatible = "mmio-sram";
335 reg = <0x0 0x50000000 0x0 0x10000>;
337 #address-cells = <1>;
339 ranges = <0 0x0 0x50000000 0x10000>;
341 cpu_scp_lpri0: scp-sram-section@0 {
342 compatible = "arm,scmi-shmem";
346 cpu_scp_lpri1: scp-sram-section@80 {
347 compatible = "arm,scmi-shmem";
351 cpu_scp_hpri0: scp-sram-section@100 {
352 compatible = "arm,scmi-shmem";
356 cpu_scp_hpri2: scp-sram-section@180 {
357 compatible = "arm,scmi-shmem";
366 compatible = "arm,scmi-smc";
367 shmem = <&cpu_scp_lpri0>, <&cpu_scp_lpri1>;
368 arm,smc-id = <0xc3000001>;
370 #address-cells = <1>;
373 scmi_devpd1: protocol@11 {
375 #power-domain-cells = <1>;
383 compatible = "linaro,scmi-optee";
384 linaro,optee-channel-id = <0>;
386 #address-cells = <1>;
389 scmi_dvfs1: protocol@13 {
391 linaro,optee-channel-id = <1>;
392 shmem = <&cpu_optee_lpri0>;
396 scmi_clk0: protocol@14 {
404 #address-cells = <2>;
408 compatible = "mmio-sram";
409 reg = <0x0 0x51000000 0x0 0x10000>;
411 #address-cells = <1>;
413 ranges = <0 0x0 0x51000000 0x10000>;
415 cpu_optee_lpri0: optee-sram-section@0 {
416 compatible = "arm,scmi-shmem";